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| 型號(hào)： | PCF84C81A |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT SINGLE CHIP MICROCONTROLLERS |
| 中文描述： | 8位單晶片微控制器 |
| 文件頁(yè)數(shù)： | 6/10頁(yè) |
| 文件大小： | 145K |
| 代理商： | PCF84C81A |
Philips Semiconductors
The I
2
C serial bus: theory and practical consideration using Philips
low-voltage PCF84Cxx and PCD33xx
μ
C families
Application note
AN168
1988 Dec
6
MOV S1, #18H
MOV S0, #40H
MOV S1, #0F8H
CALL ACKWT:
MOV A, #2AH
MOV S0,A
CALL ACKWT:
MOV S1, #0D8H
SDA
SCL
START
ADDRESS ’40H’
DATA ’2AH’
STOP
ACKNOWLEDGE
RD/WR
:Initialize S1-Slave, Receiver, Bus not
:Busy, Enable Serial I/O
:Preload S0 with Slave’s address &
:R/W bit
:Invoke start condition & slave address
:(Master, Transmitter, Bus Busy, Enable
:Serial I/O, Bit Counter = 000)
:Check for transmission complete, ack
:received, no arbitration, etc.
:Get a data byte
:Transmit data byte
:Wait for transmission complete again
:Generate Stop condition
:(Master, Transmitter, Bus not Busy)
SL00949
Figure 3.
Table 4.Binary Numbers in Bit-Count Locations
BC2, BC1 and BC0
BC2
BC1
BC0
Bits/Byte
without ACK
1
2
3
4
5
6
7
8
Bits/Byte with
ACK
2
3
4
5
6
7
8
9
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
CHECKING FOR SLAVE ACKNOWLEDGE
After a ‘Start’ condition and address have been issued, the selected
slave will have recognized and acknowledged its address by pulling
the data line low during the ninth clock pulse. During this period, the
software (which runs on the processor’s main clock) will have been
either waiting for the transfer to be completed by polling the PIN bit
in S1 which goes low on completion of a transfer/reception (whose
length is defined by the pre-loaded Bit-counter value), or by the
hardware in Serial Interrupt mode. The serial interrupt (vectored to
07H) is enabled via the EN SI (enable serial interrupt) instruction.
At the point when PIN goes low (or the serial interrupt is received)
the 9-bit transfer has been completed. The acknowledgement bit
will now be in the LRB position of register S1, and may be checked
in the routine ‘ACKWT’ (Wait for Acknowledge) as shown in Figure
4.
This routine must go one step further in multi-master systems; the
possibility of an Arbitration Lost situation may occur if other masters
are present on the bus. This condition may be detected by checking
the ‘AL’ bit (bit 3). If arbitration has been lost, provisions for
re-attempting the transmission should be taken. If arbitration is lost,
there is the possibility that the controller is being addressed as a
Slave. If this condition is to be recognized, we must test on the
‘AAS’ bit (bit 2). A ‘General Call’ address (00H) has also been
defined as an ‘a(chǎn)ll-call’ address for all slaves; bit 1, AD0, must be
tested if this feature is to be recognized by a Master.
After a successful address transfer/acknowledge, the slave is ready
to be sent its data. The instruction MOV S0,A will now automatically
send the contents of the accumulator out on the bus. After calling
the ACKWT routine once more, we are ready to terminate the
transfer. The Stop condition is created by the instruction ‘MOV S1,
#0D8H’. This re-sets the bus-busy bit, which tells the hardware to
generate a Stop – the data line makes a low-to-high transition while
the clock remains high. All bus-busy flags on other masters on the
bus are reset by this signal.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| PCF84C81AP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Telecom microcontroller |
| PCF84C81AT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Telecom microcontroller |
| PCF84C81PN | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| PCF84C853AT | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| PCF84C85A | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Microcontroller with extended I/O |
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