參數(shù)資料
型號(hào): PCD8544
廠商: NXP Semiconductors N.V.
英文描述: 48 x 84 pixels matrix LCD controller/driver
中文描述: 48 × 84像素的矩陣液晶顯示控制器/驅(qū)動(dòng)器
文件頁數(shù): 9/32頁
文件大?。?/td> 154K
代理商: PCD8544
1999 Apr 12
9
Philips Semiconductors
Product specification
48
×
84 pixels matrix LCD controller/driver
PCD8544
7.7
Addressing
Data is downloaded in bytes into the 48 by 84 bits RAM
data display matrix of PCD8544, as indicated in
Figs. 3, 4, 5 and 6. The columns are addressed by the
address pointer. The address ranges are: X 0 to 83
(1010011), Y 0 to 5 (101). Addresses outside these
ranges are not allowed. In the vertical addressing mode
(V = 1), the Y address increments after each byte (see
Fig.5). After the last Y address (Y = 5), Y wraps around
to 0 and X increments to address the next column. In the
horizontal addressing mode (V = 0), the X address
increments after each byte (see Fig.6). After the last
X address (X = 83), X wraps around to 0 and
Y increments to address the next row. After the very last
address (X = 83 and Y = 5), the address pointers wrap
around to address (X = 0 and Y = 0).
7.7.1
D
ATA STRUCTURE
Fig.4 RAM format, addressing.
handbook, full pagewidth
MGL638
0
0
5
MSB
Y-address
X-address
83
Fig.5 Sequence of writing data bytes into RAM with vertical addressing (V = 1).
handbook, halfpage
MGL639
0
0
5
503
5
4
3
2
1
0
7
6
Y-address
X-address
83
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