參數(shù)資料
型號: PCD5091
廠商: NXP Semiconductors N.V.
英文描述: DECT baseband controller
中文描述: 無繩基帶控制器
文件頁數(shù): 7/16頁
文件大?。?/td> 128K
代理商: PCD5091
1997 Jul 21
7
Philips Semiconductors
Objective specification
DECT baseband controller
PCD5091
5.2
Pin description
Table 1
QFP100 and LQFP100 packages
SYMBOL
PIN
I/O
STATE
AFTER
RESET
PIN TYPE
PIN DESCRIPTION
QFP100 LQFP100
ANT_SW1
ANT_SW0
CLK100
1
2
3
99
100
1
O
O
O
H
H
H
ISP2DRF3
ISP2DRF3
ISP2DPES
antenna switch 1 output
antenna switch 0 output
100 Hz signal related to DECT frame timing
output
enable transmitter output
switch transmitter power output
unmodulated transmitter data output
GMSK modulated transmitter data output
VCO band switch output
synthesizer lock input
synthesizer enable output
serial synthesizer data output
clock for serial synthesizer interface output
switch synthesizer power output
13.824 MHz reference clock for synthesizer
output
negative supply voltage 1
positive supply voltage for RF interface level
shifters
positive supply voltage 1 (+3 V)
switch slicer time constant output
switch receiver power output
positive input for receiver data
negative input for receiver data
enable receiver output
analog input for RSSI measurement
analog input to ADC
analog input for battery voltage
measurement
3.456 MHz clock output for external ADPCM
codec
T_ENABLE
T_PWR_RMP
T_DATA
T_GMSK
VCO_BND_SW
SYNTH_LOCK
S_ENABLE
S_DATA
S_CLK
S_PWR
REF_CLK
4
5
6
7
8
9
10
11
12
13
14
2
3
4
5
6
7
8
9
10
11
12
O
O
O
O
O
I
O
O
O
O
O
H
L
off
L
L
L
L
L
H
ISP2DRF3
ISP2DRF3
ISF2DRF3
ANAIOD1
ISP2DRF3
DIPP0RF3
ISP2DRF3
ISP2DRF3
ISP2DRF3
ISP2DRF3
ISP4DRF3
running
V
SS1
V
DD_RF
15
16
13
14
supply
supply
V
DD3V_1
SLICE_CTR
R_PWR
R_DATAP
R_DATAM
R_ENABLE
RSSI_AN
VANLI
VBAT
17
18
19
20
21
22
23
24
25
15
16
17
18
19
20
21
22
23
O
O
I
I
O
I
I
I
L
H
H
supply
ISP2DRF3
ISP2DRF3
ANAIOD2
ANAIOD2
ISP2DRF3
ANAIOD1
ANAIOD1
ANAIOD1
CLK3
26
24
O
L
ISP2DPES
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