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參數(shù)資料
| 型號(hào)： | PCD5091 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | DECT baseband controller |
| 中文描述： | 無(wú)繩基帶控制器 |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 128K |
| 代理商： | PCD5091 |
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1997 Jul 21
10
Philips Semiconductors
Objective specification
DECT baseband controller
PCD5091
EA
88
86
I
ISF2DPES
external access enable (80C51); active
LOW
negative supply voltage 5
positive supply voltage 3 for the +5 V
interface
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
bidirectional 80C51 port pin
(ISQ2CPES in PCD5090/xxx,
PCA5097/xxx)
master reset input (Schmitt trigger)
reset output
V
SS5
V
DD5V_3
89
90
87
88
supply
supply
P0.7
91
89
I/O
off
H
ISP2DPES
ISQ2CPES
P0.6
92
90
I/O
off
H
ISP2DPES
ISQ2CPES
P0.5
93
91
I/O
off
H
ISP2DPES
ISQ2CPES
P0.4
94
92
I/O
off
H
ISP2DPES
ISQ2CPES
P0.3
95
93
I/O
off
H
ISP2DPES
ISQ2CPES
P0.2
96
94
I/O
off
H
ISP2DPES
ISQ2CPES
P0.1
97
95
I/O
off
H
ISP2DPES
ISQ2CPES
P0.0
98
96
I/O
off
H
ISP2DPES
ISQ2CPES
M_RESET
RESET_OUT
99
100
97
98
I
H
DIDP0PES
ISF2DPES
O
SYMBOL
PIN
I/O
STATE
AFTER
RESET
PIN TYPE
PIN DESCRIPTION
QFP100 LQFP100
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCD50912 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low cost; low power DECT baseband controllers ABC-PRO |
| PCD50912H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low cost; low power DECT baseband controllers ABC-PRO |
| PCD5091H | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
| PCD5091HZ | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
| PCD5092 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:DECT baseband controller |
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