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參數(shù)資料
| 型號： | PCD3360 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Programmable multi-tone telephone ringer |
| 中文描述： | 可編程多音頻電話鈴聲 |
| 文件頁數(shù)： | 12/20頁 |
| 文件大?。?/td> | 117K |
| 代理商： | PCD3360 |
1997 Jan 15
12
Philips Semiconductors
Product specification
Programmable multi-tone telephone ringer
PCD3360
11 AC CHARACTERISTICS
V
DD
= 6.0 V; V
SS
= 0 V; f
OSC
= 64 kHz; T
amb
=
25 to +70
°
C; valid enable conditions at FDI and FDE; all voltages with
respect to V
SS
; unless otherwise specified.
Notes
1.
2.
The switch-on delay is measured in cycles of incoming ringing frequency.
Lead lengths of R
OSC
and C
OSC
to be kept to a minimum.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
t
d(on)
switch-on delay
FDE = LOW; ringing frequency
within limit set by FL and FH; note 1
FL = LOW
FL = HIGH
R
OSC
= 365 kW; C
OSC
= 56 pF;
T
amb
= 25
°
C; note 2
1
1.5
cycle
t
d(off)
switch-off delay
60
64
50
75
68
ms
ms
kHz
f
OSC
oscillator frequency
f
OSC
/
V
P
oscillator frequency variation
with respect to supply voltage
oscillator frequency variation
with respect to temperature
1
%/V
f
OSC
/
T
0.05
%/K
12 APPLICATION INFORMATION
Application of the PCD3360 in a telephone ringer circuit
together with a loudspeaker is shown in Fig.8.
The threshold levels V
H
and V
L
of the frequency
discriminator circuit are determined by:
The logic threshold of input FDI (0.5V
DD
, typically 3.4 V
for V
DD
= 6.8 V)
The pull-down current of input FDI (20
μ
A typically for
FDI < 3.4 V)
The value of R2 (680 k
in Fig.8).
For a positive slope the voltage at R2 must exceed the
value V
H
before FDI will become HIGH; V
H
is the sum of
the input threshold and the voltage drop across R2 thus:
3
–
×
+
=
For a negative slope, the voltage at R2 must decrease
below the value of V
L
before FDI will become LOW.
Because the current into FDI is negligible with FDI = HIGH
the voltage drop across R2 can be discounted, thus
V
L
= 3.4 V.
The minimum operating voltage across C3 is 17.8 V which
is determined by:
The minimum operating voltage of the PCD3360 (5.8 V)
The supply current of the PCD3360 (120
μ
A max.)
The value of R3 (100 k
in Fig.8).
V
H
3.4
680
10
20
10
6
–
×
×
17 V
=
The total switch-on delay equals approximately the time
required to charge the supply capacitor C3 to the minimum
operating value, plus the specified switch-on delay of the
PCD3360.
The high operating voltage combined with the class D
output stage ensures the optimal energy conversion and
thereby a high sound level. The design can easily be
optimized for parallel or series connection of more than
one ringer. The diode bridge, zener diode (D1) and resistor
R1 protect the ringer against transients up to 5 kV. During
these surges the voltage on the 68 V zener diode
(BZW03-C68) can rise to 100 V; the DMOS transistor
BST72A (TR1) has a maximum drain-source voltage of
100 V. Up to 220 V, 50 Hz can be applied to the a/b
terminals without damaging the ringer.
The choke (L1) in series with the 50
loudspeaker
increases the sound pressure level by approximately 3 dB
by suppression of the 32 kHz carrier frequency and its
sidebands. The flyback diode BAX18A (D2) is a fast type
with low forward voltage to obtain high efficiency.
Application of the PCD3360 together with a PXE
transducer is shown in Fig.9. The only significant
difference between Fig.8 and Fig.9 is the output stage.
Two BST72A transistors provide an output voltage swing
almost equal to the voltage at C3. Pins IS1 and IS2 are
inoperative because DM = HIGH. Volume control is
possible using resistor R
V
.
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