參數(shù)資料
型號: PCD3359AT
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 8-bit microcontroller with DTMF generator and 128 bytes EEPROM
中文描述: 8-BIT, MROM, 16 MHz, MICROCONTROLLER, PDSO28
封裝: 7.50 MM, PLASTIC, SO-28
文件頁數(shù): 11/32頁
文件大?。?/td> 165K
代理商: PCD3359AT
1998 May 11
11
Philips Semiconductors
Product specification
8-bit microcontroller with DTMF
generator and 128 bytes EEPROM
PCD3359A
6.6
Musical scale frequencies
Finally, two octaves of musical scale in steps of semitones
can be realized, again assuming an oscillator frequency
f
xtal
= 3.58 MHz (Table 10). It is suggested to define the
frequency by the HGF register while the LGF contains
00H, disabling Low Group Frequency generation.
Table 10
Musical scale frequencies and their
implementation
Note
1.
Standard scale based on A4 at 440 Hz.
NOTE
HGF
VALUE
(HEX)
FREQUENCY (Hz)
STANDARD
(1)
GENERATED
D#5
E5
F5
F#5
G5
G#5
A5
A#5
B5
C6
C#6
D6
D#6
E6
F6
F#6
G6
G#6
A6
A#6
B6
C7
C#7
D7
D#7
F8
EA
DD
D0
C5
B9
AF
A5
9C
93
8A
82
7B
74
6D
67
61
5C
56
51
4D
48
44
40
3D
622.3
659.3
698.5
740.0
784.0
830.6
880.0
923.3
987.8
1046.5
1108.7
1174.7
1244.5
1318.5
1396.9
1480.0
1568.0
1661.2
1760.0
1864.7
1975.5
2093.0
2217.5
2349.3
2489.0
622.5
659.5
697.9
741.1
782.1
832.3
879.3
931.9
985.0
1044.5
1111.7
1179.0
1245.1
1318.9
1402.1
1482.2
1572.0
1655.7
1768.5
1875.1
1970.0
2103.3
2223.3
2358.1
2470.4
7
EEPROM AND TIMER 2 ORGANIZATION
The PCD3359A has 128 bytes of Electrically Erasable
Programmable Read-Only Memory (EEPROM). Such
non-volatile storage provides data retention without the
need for battery backup. In telecom applications, the
EEPROM is used for storing redial numbers and for short
dialling of frequently used numbers. More generally,
EEPROM may be used for customizing microcontrollers,
such as to include a PIN code or a country code, to define
trimming parameters, to select application features from
the range stored in ROM.
The most significant difference between a RAM and an
EEPROM is that a bit in EEPROM, once written to a
logic 1, cannot be cleared by a subsequent write
operation. Successive write accesses actually perform a
logical OR with the previously stored information.
Therefore, to clear a bit, the whole byte must be erased
and re-written with the particular bit cleared. Thus, an
erase-and-write operation is the EEPROM equivalent of a
RAM write operation.
Whereas read access times to an EEPROM are
comparable to RAM access times, write and erase
accesses are much slower at 5 ms each. To make these
operations more efficient, several provisions are available.
First, the EEPROM array is structured into 32 four-byte
pages (see Fig.5) permitting access to 4 bytes in parallel
(write page, erase/write page and erase page). It is also
possible to erase and write individual bytes. Finally, the
EEPROM address register provides auto-incrementing,
allowing very efficient read and write accesses to
sequential bytes.
To simplify the erase and write timing, the derivative 8-bit
down-counter (Timer 2) with reload register is provided.
In addition to EEPROM timing, Timer 2 can be used for
general real-time tasks, such as for measuring signal
duration and for defining pulse widths.
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