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參數(shù)資料
| 型號： | PCA9559 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 5-bit multiplexed/1-bit latched 6-bit I I C EEPROM(5位多路的/1位鎖存的6位IIC EEPROM) |
| 中文描述： | 5位multiplexed/1-bit鎖存6位國際進(jìn)口的EEPROM（5位多路的/ 1位鎖存的6位國際進(jìn)口的EEPROM） |
| 文件頁數(shù)： | 2/10頁 |
| 文件大?。?/td> | 101K |
| 代理商： | PCA9559 |
Philips Semiconductors
Product specification
PCA9559
5-bit multiplexed/1-bit latched 6-bit I
2
C EEPROM
2
2000 Jan 31
853-2181 23063
FEATURES
5-bit 2-to-1 multiplexer, 1-bit latch
6-bit internal non-volatile register
Internal non-volatile register programmable and readable via I
2
C bus
Override input forces all outputs to logic 0
5 open drain multiplexed outputs
1 open drain non-multiplexed (latched) output
5V and 2.5V tolerant inputs
Useful for ‘jumperless’ configuration of PC motherboards
2 address pins, allowing up to 4 devices on the I
2
C bus
DESCRIPTION
The primary function of the 5-bit multiplexer, 1-bit latch is to enable
system configuration.
PIN CONFIGURATION
I2
C SCL
I
2
C SDA
MUX_IN B
V
CC
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
MUX_IN C
MUX_IN D
MUX_IN E
MUX_OUT B
MUX_OUT C
MUX_OUT D
MUX_OUT E
SW00216
GND
9
10
A1
A0
12
11
NON_MUXED_OUT
MUX_OUT A
MUX_IN A
WP
OVERRIDE #
MUX_SELECT
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DRAWING NUMBER
20-Pin Plastic TSSOP
0
°
C to +70
°
C
PCA9559 PW DH
SOT360-1
FUNCTIONAL DESCRIPTION
When the MUX_SELECT signal is logic 0, the multiplexer will select
the data from the non-volatile register to drive on the MUX_OUT
pins. When the MUX_SELECT signal is logic 1, the multiplexer will
select the MUX_IN lines to drive on the MUX_OUT pins. The
MUX_SELECT signal is also used to latch the NON_MUXED_OUT
signal which outputs data from the non-volatile register. The
NON_MUXED_OUT signal latch is transparent when MUX_SELECT
is in a logic 0 state, and will latch data when MUX_SELECT is in a
logic 1 state. When the active-LOW OVERRIDE# signal is set to
logic 0 and the MUX_SELECT signal is at a logic 0, all outputs will
be driven to logic 0. This information is summarized in Table 1.
The Write Protect (WP) input is used to control the ability to write the
contents of the 6-bit non-volatile register. If the WP signal is logic 0,
the I
2
C bus will be able to write the contents of the non-volatile
register. If the WP signal is logic 1, data will not be allowed to be
written into the non-volatile register.
The factory default for the contents of the non-volatile register are all
logic 0. These stored values can be read or written using the I
2
C
bus (described in the next section).
The OVERRIDE#, WP, MUX_IN, and MUX_SELECT signals have
internal pullup resistors. See the DC and AC Characteristics for
hysteresis and signal spike suppression figures.
FUNCTION TABLE
OVERRIDE#
MUX_SELECT
MUX_OUT
OUTPUTS
NON_MUXED_OUT
OUTPUT
0
0
All 0’s
All 0’s
0
1
MUX_IN
inputs
Latched
NON_MUXED
_OUT
1
1
0
From non-
volatile
register
From non-volatile
register
1
1
MUX_IN
inputs
From non-volatile
register
NOTE:
1. NON_MUXED_OUT state will be the value present on the output
at the time of the MUX_SELECT input transitioned from a logic 0
to a logic 1 state.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PCA9559PW | 功能描述:多路器開關(guān) IC 5BIT MUX/1BIT LATCH 6-BIT DIPSW RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻（最大值）:7 Ohms 開啟時(shí)間（最大值）: 關(guān)閉時(shí)間（最大值）: 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16 |
| PCA9559PW,112 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 5BIT MUX/1BIT LATCH RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| PCA9559PW,118 | 功能描述:電可擦除可編程只讀存儲(chǔ)器 5-BIT MUX/1-BIT LATCH 6-BIT 12 RoHS:否 制造商:Atmel 存儲(chǔ)容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時(shí)鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| PCA9559PW/N,118 | 制造商:NXP Semiconductors 功能描述:Tape & Reel |
| PCA9559PW112 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
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