參數(shù)資料
型號： PCA9554ADBRG4
廠商： TEXAS INSTRUMENTS INC
元件分類： 微控制器/微處理器
英文描述： 8 I/O, PIA-GENERAL PURPOSE, PDSO16
封裝： GREEN, PLASTIC, SSOP-16
文件頁數(shù)： 5/39頁
文件大?。?/td> 985K
代理商： PCA9554ADBRG4
I
2C Interface Timing Requirements
Switching Characteristics
www.ti.com........................................................................................................................................... SCPS127D – SEPTEMBER 2006 – REVISED AUGUST 2008
over operating free-air temperature range (unless otherwise noted) (see Figure 10)
STANDARD MODE
FAST MODE
I2C BUS
UNIT
MIN
MAX
MIN
MAX
fscl
I2C clock frequency
0
100
0
400
kHz
tsch
I2C clock high time
4
0.6
s
tscl
I2C clock low time
4.7
1.3
s
tsp
I2C spike time
50
ns
tsds
I2C serial-data setup time
250
100
ns
tsdh
I2C serial-data hold time
0
ns
ticr
I2C input rise time
1000
20 + 0.1Cb
(1)
300
ns
ticf
I2C input fall time
300
20 + 0.1Cb
(1)
300
ns
tocf
I2C output fall time
10-pF to 400-pF bus
300
20 + 0.1Cb
(1)
300
ns
tbuf
I2C bus free time between Stop and Start
4.7
1.3
s
tsts
I2C Start or repeated Start condition setup
4.7
0.6
s
tsth
I2C Start or repeated Start condition hold
4
0.6
s
tsps
I2C Stop condition setup
4
0.6
s
tvd(data) Valid data time
SCL low to SDA output valid
300
50
ns
ACK signal from SCL low to
tvd(ack)
Valid data time of ACK condition
0.3
3.45
0.1
0.9
s
SDA (out) low
Cb
I2C bus capacitive load
400
ns
(1)
Cb = Total capacitive load of one bus in pF
over operating free-air temperature range (unless otherwise noted) (see Figure 11 and Figure 12)
STANDARD MODE
FAST MODE
FROM
TO
I2C BUS
PARAMETER
UNIT
(INPUT)
(OUTPUT)
MIN
MAX
MIN
MAX
tiv
Interrupt valid time
P port
INT
4
s
tir
Interrupt reset delay time
SCL
INT
4
s
tpv
Output data valid
SCL
P7–P0
200
ns
tps
Input data setup time
P port
SCL
100
ns
tph
Input data hold time
P port
SCL
1
s
Copyright 2006–2008, Texas Instruments Incorporated
13
Product Folder Link(s): PCA9554A
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