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參數(shù)資料
| 型號： | PCA9554ADBRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8 I/O, PIA-GENERAL PURPOSE, PDSO16 |
| 封裝： | GREEN, PLASTIC, SSOP-16 |
| 文件頁數(shù)： | 34/39頁 |
| 文件大?。?/td> | 985K |
| 代理商： | PCA9554ADBRG4 |
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Data From
Shift Register
Data From
Shift Register
Write Configuration
Pulse
Write Pulse
Read Pulse
Write Polarity
Pulse
Data From
Shift Register
Output Port
Register
Configuration
Register
Input Port
Register
Polarity
Inversion
Register
Polarity
Register Data
Input Port
Register Data
GND
P0 to P7
VCC
Output Port
Register Data
Q1
Q2
D
CK
FF
Q
D
CK
FF
Q
D
CK
FF
Q
D
CK
FF
Q
INT
100 kW
I/O Port
I
2C Interface
SCPS127D – SEPTEMBER 2006 – REVISED AUGUST 2008........................................................................................................................................... www.ti.com
SIMPLIFIED SCHEMATIC OF P0 TO P7
A.
At power-on reset, all registers return to default values.
When an I/O is configured as an input, FETs Q1 and Q2 are off, which creates a high impedance input with a
weak pullup (100 k
typ) to VCC. The input voltage may be raised above VCC to a maximum of 5.5 V.
If the I/O is configured as an output, Q1 or Q2 is enabled, depending on the state of the output port register. In
this case, there are low impedance paths between the I/O pin and either VCC or GND. The external voltage
applied to this I/O pin should not exceed the recommended levels for proper operation.
The bidirectional I2C bus consists of the serial clock (SCL) and serial data (SDA) lines. Both lines must be
connected to a positive supply through a pullup resistor when connected to the output stages of a device. Data
transfer may be initiated only when the bus is not busy.
I2C communication with this device is initiated by a master sending a Start condition, a high-to-low transition on
the SDA input/output while the SCL input is high (see Figure 1). After the Start condition, the device address byte
is sent, most significant bit (MSB) first, including the data direction bit (R/W).
After receiving the valid address byte, this device responds with an acknowledge (ACK), a low on the SDA
input/output during the high of the ACK-related clock pulse. The address inputs (A0–A2) of the slave device must
not be changed between the Start and Stop conditions.
On the I2C bus, only one data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the high pulse of the clock period, as changes in the data line at this time are interpreted as control
commands (Start or Stop) (see Figure 2).
4
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): PCA9554A
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| PCA9554ADGV | 制造商:TI 制造商全稱:Texas Instruments 功能描述:REMOTE 8-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS |
| PCA9554ADGVR | 功能描述:接口-I/O擴展器 Rem 8B I2C & SMBus I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9554ADGVRG4 | 功能描述:接口-I/O擴展器 Rem 8B I2C and SMBus I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9554ADW | 功能描述:接口-I/O擴展器 Rem 8B I2C & SMBus I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
| PCA9554ADWG4 | 功能描述:接口-I/O擴展器 Rem 8B I2C and SMBus I/O Expander RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel |
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