參數(shù)資料
型號: PCA9535ECDWR2G
廠商: ON Semiconductor
文件頁數(shù): 5/20頁
文件大小: 0K
描述: 16-BIT I/O EXPANDER
標準包裝: 1,000
接口: I²C 總線,SM 總線
輸入/輸出數(shù): 16
中斷輸出:
頻率 - 時鐘: 100kHz
電源電壓: 1.65 V ~ 5.5 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC
包裝: 帶卷 (TR)
包括: *
PCA9535E, PCA9535EC
http://onsemi.com
13
Interrupt Output
The opendrain interrupt output is activated when an I/O
pin configured as an input changes state. The interrupt is
deactivated when the input pin returns to its previous state
or when the Input Port register is read (see Figure 9). A pin
configured as an output cannot cause an interrupt. Since
each 8bit port is read independently, the interrupt caused by
Port 0 will not be cleared by a read of Port 1 or the other way
around.
Remark: Changing an I/O from an output to an input may
cause a false interrupt to occur if the state of the pin does not
match the contents of the Input Port register.
APPLICATION INFORMATION
Figure 11. Typical Application
Device address configured as 0100 000xb for this example.
IO0_0, IO0_2, IO0_3 configured as outputs.
IO0_1, IO0_4, IO0_5 configured as inputs.
IO0_6, IO0_7, and IO1_0 to IO1_7 configured as inputs.
PCA9535E
IO0_0
IO0_1
SCL
SDA
VDD
(5 V)
MASTER
CONTROLLER
INT
IO0_2
VDD
AD2
AD1
AD0
VDD
GND
INT
10 k
W
SUBSYSTEM 1
(e.g., temp sensor)
IO0_3
INT
SUBSYSTEM 2
(e.g., counter)
RESET
controlled
switch
(e.g.,
7SB or FST)
VDD
A
B
ENABLE
SUBSYSTEM 3
(e.g., alarm system)
ALARM
IO0_4
IO0_5
IO0_6
10
DIGIT
NUMERIC
KEYPAD
VSS
10 k
W
10 k
W
2 k
W
IO0_7
IO1_0
IO1_1
IO1_2
IO1_3
IO1_4
IO1_5
IO1_6
IO1_7
SDA
SCL
100 k
W
(x3)
Minimizing IDD When the I/Os are Used to Control
LEDs
To use the PCA9535E I/Os to control LEDs, the I/Os are
normally connected to VDD through a resistor as shown in
Figure 11. The LED acts as a diode. When the LED is off,
the I/O VI is about 1.2 V less than VDD. The supply current,
IDD, increases as VI becomes lower than VDD.
For applications requiring low current consumption, such
as battery power applications, it is recommended that the I/O
pin voltages be greater than or equal to VDD when the LED
is off. This would minimize current consumption. Figure 12
shows a high value resistor in parallel with the LED.
Figure 13 shows VDD less than the LED supply voltage by
at least 1.2 V. Both of these methods maintain the I/O VI at
or above VDD and prevents additional supply current
consumption when the LED is off.
This concern does not occur for the PCA9535EC because
the PCA9535EC I/O pins are opendrain.
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