參數(shù)資料
型號： PCA9505DGG,118
廠商： NXP Semiconductors
文件頁數(shù)： 10/34頁
文件大?。?/td> 0K
描述： IC I/O EXPANDER I2C 40B 56TSSOP
標準包裝： 2,000
接口： I²C
輸入/輸出數(shù)： 40
中斷輸出： 是
頻率 - 時鐘： 400kHz
電源電壓： 2.3 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 56-TFSOP（0.240"，6.10mm 寬）
供應商設備封裝： 56-TSSOP
包裝： 帶卷 (TR)
包括： POR
其它名稱： 935284486118
PCA9505DGG-T
PCA9505DGG-T-ND
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx
xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx
xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx
PCA
950
5_950
6
A
lli
n
for
m
at
ion
pr
ovi
ded
in
this
do
cum
ent
i
s
sub
jec
tto
leg
a
ld
is
c
la
im
er
s.
NXP
B.V
.
2010.
Al
lr
ig
h
ts
re
s
e
rv
ed.
Produ
ct
d
a
ta
sheet
Rev
.4
—
3
A
ugu
st
2
010
18
o
f34
N
X
P
Semi
conductor
s
PCA9505/06
40
-bit
I
2C-bus
I/O
port
with
RESET
,O
E
and
INT
If AI = 0, the same register is read during the whole sequence.
If AI = 1, the register value is incremented after each read. When the last register bank is read, it rolls over to the first byte of the category (see category definition in
The INT signal is released only when the last register containing an input that changed has been read. For example, when IO2_4 and IO4_7 change at the same time and
an Input Port register’s read sequence is initiated, starting with IP0, INT is released after IP4 is read (and not after IP2 is read).
Fig 14. Read from Input Port, Output Port, I/O Configuration, Polarity Inversion or Mask Interrupt registers
002aab499
0
1
0
slave address
R/W
S
START condition
SDA
A
acknowledge
from slave
1
0 D5 D4 D3 D2 D1 D0
command register
AI = 1
A
acknowledge from slave
A
P
STOP
condition
A
acknowledge from master
D[5:0] = 00 1000 for Output Port register bank 0
D[5:0] = 01 0000 for Polarity Inversion register bank 0
Sr
repeated START condition
0
1
0
1
slave address
R/W
A
acknowledge from slave
D[5:0] = 01 1000 for Configuration register bank 0
(cont.)
At this moment master-transmitter becomes master-receiver,
and slave-receiver becomes slave-transmitter.
DATA
data from register
first byte
register determined by D[5:0]
A
acknowledge from master
DATA
data from register
second byte
DATA
data from register
last byte
no acknowledge from master
D[5:0] = 00 0000 for Input Port register bank 0
D[5:0] = 10 0000 for Mask Interrupt register bank 0
A2 A1 A0
相關(guān)PDF資料
PDF描述
PCA9507D,118 IC I/O EXPANDER I2C 24B 8SOIC
PCA9534PW,112 IC I/O EXPANDER I2C 8B 16TSSOP
PCA9535BS1,118 IC I/O EXPANDER I2C 16B 24HVQFN
PCA9535EDWR2G 16-BIT I/O EXPANDER
PCA9536D,112 IC I/O EXPANDER I2C 4B 8SOIC
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCA9506 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:40-bit I2C-bus I/O port with RESET, OE and INT
PCA9506BS 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:40-bit I2C-bus I/O port with RESET, OE and INT
PCA9506BS,118 功能描述:接口-I/O擴展器 I/O EXPANDER I2C RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
PCA9506BS,118-CUT TAPE 制造商:NXP 功能描述:PCA9506 Series 40-Bit I2C-Bus I/O Port with RESET OE and INT - HVQFN - 56
PCA9506DGG 功能描述:接口-I/O擴展器 I/O EXPANDER I2C RoHS:否 制造商:NXP Semiconductors 邏輯系列: 輸入/輸出端數(shù)量: 最大工作頻率:100 kHz 工作電源電壓:1.65 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:HVQFN-16 封裝:Reel
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*