參數(shù)資料
型號: PC33926PNBR2
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: 5.0 A Throttle Control H-Bridge
中文描述: 5.0甲節(jié)氣門控制H橋
文件頁數(shù): 6/24頁
文件大?。?/td> 378K
代理商: PC33926PNBR2
Analog Integrated Circuit Device Data
Freescale Semiconductor
6
33926
ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
STATIC ELECTRICAL CHARACTERISTICS
Table 3. Static Electrical Characteristics
Characteristics noted under conditions 8.0 V
V
PWR
28 V, -
40
°
C
T
A
125
°
C, GND = 0 V unless otherwise noted. Typical
values noted reflect the approximate parameter means at T
A
= 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
POWER INPUTS (VPWR)
Operating Voltage Range
(10)
Steady-State
Transient (t < 500 ms)
(11)
Quasi-Functional (R
DS(ON)
May Increase by 50%)
Sleep State Supply Current
(12)
EN,
D2
, INV, SLEW = Logic [0], IN1, IN2, D1 = Logic [1], and
I
OUT
= 0 A
Standby Supply Current (Part Enabled)
I
OUT
= 0 A, V
EN
= 5.0 V
Undervoltage Lockout Thresholds
V
PWR(
falling)
V
PWR(
rising)
Hysteresis
V
PWR(SS)
V
PWR(
t
)
V
PWR(QF)
I
PWR(SLEEP)
8.0
5.0
28
40
8.0
V
50
μ
A
I
PWR(STANDBY)
20
mA
V
UVLO
(
ACTIVE
)
V
UVLO
(
INACTIVE
)
V
UVLO
(
HYS
)
4.15
150
200
5.0
350
V
V
mV
CHARGE PUMP
Charge Pump Voltage (CP Capacitor = 33 n
F), No PWM
V
PWR
= 5.0 V
V
PWR
= 28 V
Charge Pump Voltage (CP Capacitor = 33 n
F), PWM = 20kHz,
Slew Rate = Fast
V
PWR
= 5.0 V
V
PWR
= 28 V
CONTROL INPUTS
V
CP
- V
PWR
3.5
12
V
V
CP
- V
PWR
TBD
TBD
V
Operating Input Voltage (EN, IN1, IN2, D1, D2, INV, SLEW)
V
I
5.5
V
Input Voltage (IN1, IN2, D1,
D2
, INV, SLEW)
(13)
Logic Threshold HIGH
Logic Threshold LOW
Hysteresis
V
IH
V
IL
V
HYS
V
TH
2.0
250
400
1.0
V
V
mV
Input Voltage (EN) Threshold
1.0
2.0
V
Logic Input Currents, VPWR = 8.0V
Inputs EN, D2, INV, SLEW (internal pull-downs), V
IH
= 5.0V
Inputs IN1, IN2, D1 (internal pull-ups), VIL = 0V
I
IN
20
-200
80
-80
200
-20
μ
A
Notes
10.
Device specifications are characterized over the range of 8.0 V
V
PWR
28 V. Continuous operation above 28 V may degrade device
reliability. Device is operational down to 5.0 V, but below 8.0 V the output resistance may increase by 50 percent.
Device will survive the transient overvoltage indicated for a maximum duration of 500 ms. Transient not to be repeated more than once
every 10 seconds.
I
PWR(sleep)
is with Sleep mode activated and EN,
D2
, INV, SLEW = logic [0], and IN1, IN2, D1 = logic [1] or with these inputs left floating.
SLEW Input Voltage Threshold parameters are guaranteed by design.
11.
12.
13.
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