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參數(shù)資料
| 型號(hào)： | PC33926PNBR2 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 5.0 A Throttle Control H-Bridge |
| 中文描述： | 5.0甲節(jié)氣門控制H橋 |
| 文件頁數(shù)： | 22/24頁 |
| 文件大?。?/td> | 378K |
| 代理商： | PC33926PNBR2 |
Analog Integrated Circuit Device Data
Freescale Semiconductor
22
33926
REVISION HISTORY
REVISION HISTORY
REVISION
DATE
DESCRIPTION
Converted to Freescale format, Implemented changes listed below.
Implemented revision history page.
Updated Figure 2. 33926 Simplified Internal Block Diagram.
Revised Table2. Maximum Ratings
Continuous Output Current changed from 5.5A to 5.0A (Parameter changed in the text through the
document).
ESD Voltage: added Charge Device Model.
Peak Pin Reflow Temperature During Solder Mounting changed from 260 to 250 deg.C.
Revised Table 3. Static Electrical Characteristics
Output Current Regulation Threshold: Min value changed from 5.5A to 5.2A.
High-Side Short Circuit Detection Threshold - Parameter Guaranteed by Design.
Low-Side Short Circuit Detection Threshold - Parameter Guaranteed by Design.
Feedback Current: Parameter values updated.
Status Flag SET Voltage: Max value changed from 1.0V to 0.4V.
Revised Table 4. Dynamic Electrical Characteristics
Output OFF Delay: Max. value changed from 18
μ
s to 12
μ
s.
Output Rise and Fall Time: Max value changed from 8.0
μ
s to 6.0
μ
s.
Short Circuit Overtemperature Turn-OFF (Latch-OFF) Time: Typ and Max values changed from
4.0
μ
s, 8.0
μ
s to 1.0
μ
s, 2.0
μ
s respectively.
Charge Pump Operating Frequency: Typ 7 MHz, new parameter added into the table.
Note 25: condition changed from Iout = 3.0A to R
load
= 600 ohm.
Added Figure 10. 33926 Power Stage Operation.
Updated Figure 11. 33926 Typical Application Schematic.
Updated the Freescale format to the prevailing form and style
Added thermal addendum.
Corrected minor typos formatting throughout the document.
Corrected labels on the
Internal Block Diagram
Added “These parameters are not production tested” to the Maximum Ratings heading
Changed the values for
Logic Input Voltage
(2)
and
SF Output
(3)
Made corrections on note
(4)
,
(7)
, and
(10)
for
Maximum Ratings
Changed labels or values for
Sleep State Supply Current
(12)
,
Undervoltage Lockout Thresholds
,
Charge Pump Voltage (CP Capacitor = 33 nF), No PWM
,
Input Voltage (IN1, IN2, D1, D2, INV, SLEW)
(13)
,
Logic Input Currents, VPWR = 8.0V
,
Output-ON Resistance
(15)
, ILOAD = 3.0A
,
Output Current
Regulation Threshold
,
Output Leakage Current
(16)
, Outputs off, VPWR = 28V
,
Feedback Current (pin
FB sourcing current)
(17)
, and
Status Flag Leakage Current
(19)
in the
Static Electrical Characteristics
Added
Charge Pump Voltage (CP Capacitor = 33 nF), PWM = 20kHz, Slew Rate = Fast
and
Operating
Input Voltage (EN, IN1, IN2, D1, D2, INV, SLEW)
in the
Static Electrical Characteristics
Added note
This parameter is Guaranteed By Design.
to
Static Electrical Characteristics
Changed labels or values for
ILIM Output Constant-OFF Time
(24)
,
ILIM Blanking Time
(25)
,
Output
Rise and Fall Time
(27)
and
Short Circuit Overtemperature Turn-OFF (Latch-OFF) Time
(28)
(29)
in the
Dynamic Electrical Characteristics
Made changes or corrections to note
(24)
,
(27)
,
(28)
, and
(29)
for
Dynamic Electrical Characteristics
Made corrections to
Figure 4, Output Delay Time
,
Figure 5, Disable Delay Time
, and
Figure 6, Output
Switching Time
in
Timing Diagrams
Added
Figure 7, Current Limit Blanking Time and Constant-OFF Time
and
Figure 8, Short Circuit
Detection Turn-OFF Time tFAULT
in
Timing Diagrams
Added paragraph
Output Avalanche Protection
and
Figure 12, Avalanche Protection
to
Protection and
diagnostic features
Made minor label changes to
Figure 13, 33926 Typical Application Schematic
1.0
3/2006
2.0
9/2006
3.0
10/2006
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