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| 型號： | P89V52X2FBD,157 |
| 廠商： | NXP Semiconductors |
| 文件頁數(shù)： | 29/57頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC 80C51 MCU FLASH 8K 44-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Migrating from 8/16-Bit MCUs to 32-Bit ARMs |
| 標(biāo)準(zhǔn)包裝： | 800 |
| 系列： | 89V |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | POR |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 192 x 8 |
| RAM 容量： | 256 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-LQFP |
| 包裝： | 托盤 |
| 配用： | 622-1017-ND - BOARD 44-ZIF PLCC SOCKET 622-1012-ND - BOARD FOR P89V52X2 44-TQFP 622-1008-ND - BOARD FOR LPC9103 10-HVSON |
| 其它名稱： | 568-4250 935282529157 P89V52X2FBD |
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P89V52X2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
35 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
Map the data EEPROM into code memory space if not already mapped.
Write the data EEPROM byte address into the DPTR.
Use the MOVC instruction to read the data EEPROM.
6.13.5 Erasing a complete page (64 B)
A complete page can be erased by performing the following sequence:
Map the data EEPROM into code memory space if not already mapped.
Write the lower 8-bits of the data EEPROM page’s start address into FMADRL.
Write the ERS_DP command (33H) to FMCON.
Once the ERS_DP command is written to FMCON, code execution will stall until the
operation is completed, approximately 6 ms.
6.13.6 Data EEPROM programming and erasing using the page register
In addition to page erase, a 64 B page register is included which allows from 1 B to 64 B
of a given page to be programmed or erase/programmed at the same time, substantially
reducing overall programming time. Two programming operations are provided:
Program only operation. This operation used the PROG (48H) command and
programs the contents of the page register into the data EEPROM page. This
operation requires that the bytes being programmed have been previously erased.
This operation requires approximately 2 ms to complete.
Erase and Program operation. This operation uses the EP (68H) command to both
erase and program the bytes previously loaded into the page register. This command
is often useful to erase and reprogram a single byte of data. This operation requires
approximately 4 ms to complete.
The page register consists of 64 B and an update ag for each byte. When a LOAD
command is issued to FMCON the page register contents and all of the update ags will
be cleared. When FMDATA is written, the value written to FMDATA will be stored in the
page register at the location specied by the lower 6 bits of FMADRL. In addition, the
update ag for that location will be set. FMADRL will auto-increment to the next location.
Auto-increment after writing to the last byte in the page register will ‘wrap-around’ to the
rst byte in the page register, but will not affect FMADRL[7:6]. Bytes loaded into the page
register do not have to be continuous. Any byte location can be loaded into the page
register by changing the contents of FMADRL prior to writing to FMDATA. However, each
location in the page register can only be written once following each LOAD command.
Attempts to write to a page register location more than once should be avoided.
FMADRH and FMADRL[7:6] are used to specify a page in the code memory space. When
the PROG command is written to FMCON, the locations within the data EEPROM page
that correspond to updated locations in the page register will have their contents
programmed with the contents of their corresponding locations in the page register. Only
the bytes that were loaded into the page register will be programmed in the data EEPROM
array. Other bytes within the data EEPROM array will not be affected. The EP command
works similarly except that If the EP command is written, the corresponding bytes in the
data EEPROM will be erased prior to being programmed. This is often useful for erasing
and programming a small number of bytes or even a single byte.
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| P89V52X2FN | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 low power 8 kB flash microcontroller with 256 B RAM, 192 B data EEPROM |
| P89V52X2FN,112 | 功能描述:8位微控制器 -MCU 80C51 8K FL / 256 RM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| P89V660 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
| P89V660_08 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
| P89V660_0811 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI |
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