參數(shù)資料
型號: P89LPC932A1FDH,529
廠商: NXP Semiconductors
文件頁數(shù): 15/64頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-TSSOP
標準包裝: 51
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,LED,POR,PWM,WDT
輸入/輸出數(shù): 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-TSSOP(0.173",4.40mm 寬)
包裝: 管件
配用: DB-TSSOP-LPC932-ND - BOARD FOR LPC932 TSSOP
622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
622-1003-ND - KIT FOR LCD DEMO
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-1286-5
935276132529
P89LPC932A1FDH-S
P89LPC932A1_3
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 03 — 12 March 2007
22 of 64
NXP Semiconductors
P89LPC932A1
8-bit microcontroller with accelerated two-clock 80C51 core
[1]
Required for operation above 12 MHz.
7.13.1 Port congurations
All but three I/O port pins on the P89LPC932A1 may be congured by software to one of
four types on a bit-by-bit basis. These are: quasi-bidirectional (standard 80C51 port
outputs), push-pull, open drain, and input-only. Two conguration registers for each port
select the output type for each port pin.
1. P1.5 (RST) can only be an input and cannot be congured.
2. P1.2 (SCL/T0) and P1.3 (SDA/INT0) may only be congured to be either input-only or
open-drain.
7.13.1.1
Quasi-bidirectional output conguration
Quasi-bidirectional output type can be used as both an input and output without the need
to recongure the port. This is possible because when the port outputs a logic HIGH, it is
weakly driven, allowing an external device to pull the pin LOW. When the pin is driven
LOW, it is driven strongly and able to sink a fairly large current. These features are
somewhat similar to an open-drain output except that there are three pull-up transistors in
the quasi-bidirectional output that serve different purposes.
The P89LPC932A1 is a 3 V device, but the pins are 5 V-tolerant. In quasi-bidirectional
mode, if a user applies 5 V on the pin, there will be a current owing from the pin to VDD,
causing extra power consumption. Therefore, applying 5 V in quasi-bidirectional mode is
discouraged.
A quasi-bidirectional port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
7.13.1.2
Open-drain output conguration
The open-drain output conguration turns off all pull-ups and only drives the pull-down
transistor of the port driver when the port latch contains a logic 0. To be used as a logic
output, a port congured in this manner must have an external pull-up, typically a resistor
tied to VDD.
An open-drain port pin has a Schmitt trigger input that also has a glitch suppression
circuit.
7.13.1.3
Input-only conguration
The input-only port conguration has no output drivers. It is a Schmitt trigger input that
also has a glitch suppression circuit.
External clock input
No external reset (except during power-up)
25
External RST pin supported[1]
24
Low/medium/high speed oscillator
(external crystal or resonator)
No external reset (except during power-up)
24
External RST pin supported[1]
23
Table 5.
Number of I/O pins available …continued
Clock source
Reset option
Number of I/O pins
(28-pin package)
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