參數資料
型號: P89LPC932A1FA,112
廠商: NXP Semiconductors
文件頁數: 8/64頁
文件大?。?/td> 0K
描述: IC 80C51 MCU FLASH 8K 28-PLCC
產品培訓模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
標準包裝: 37
系列: LPC900
核心處理器: 8051
芯體尺寸: 8-位
速度: 18MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,LED,POR,PWM,WDT
輸入/輸出數: 26
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 768 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 3.6 V
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-PLCC
包裝: 管件
產品目錄頁面: 706 (CN2011-ZH PDF)
配用: DB-TSSOP-LPC932-ND - BOARD FOR LPC932 TSSOP
622-1014-ND - BOARD FOR LPC9XX TSSOP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
622-1006-ND - SOCKET ADAPTER BOARD
568-4000-ND - DEMO BOARD SPI/I2C TO DUAL UART
568-3510-ND - DEMO BOARD SPI/I2C TO UART
622-1003-ND - KIT FOR LCD DEMO
622-1002-ND - USB IN-CIRCUIT PROG LPC9XX
568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
568-1758-ND - BOARD EVAL FOR LPC93X MCU FAMILY
其它名稱: 568-4279-5
935276131112
P89LPC932A1FA
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P89LPC932A1_3
NXP
B
.V
.2007.
All
r
ights
reser
v
ed.
Pr
oduct
data
sheet
Re
v
.03
12
Mar
c
h
2007
16
of
64
NXP
Semiconductor
s
P89LPC932A1
8-bit
micr
ocontr
oller
with
accelerated
tw
o-c
loc
k
80C51
core
[1]
BRGR1 and BRGR0 must only be written if BRGEN in BRGCON SFR is logic 0. If any are written while BRGEN = 1, the result is unpredictable.
[2]
All ports are in input only (high-impedance) state after power-up.
[3]
The RSTSRC register reects the cause of the P89LPC932A1 reset. Upon a power-up reset, all reset source ags are cleared except POF and BOF; the power-on reset value is
xx11 0000.
[4]
The only reset source that affects these SFRs is power-on reset.
[5]
On power-on reset, the TRIM SFR is initialized with a factory preprogrammed value. Other resets will not cause initialization of the TRIM register.
[6]
After reset, the value is 1110 01x1, i.e., PRE2 to PRE0 are all logic 1, WDRUN = 1 and WDCLK = 1. WDTOF bit is logic 1 after watchdog reset and is logic 0 after power-on reset.
Other resets will not affect WDTOF.
TISE2
CCU interrupt status encode
register
DEH
-----
ENCINT.
2
ENCINT.
1
ENCINT.
0
00
xxxx x000
TL0
Timer 0 low
8AH
00
0000 0000
TL1
Timer 1 low
8BH
00
0000 0000
TL2
CCU timer low
CCH
00
0000 0000
TMOD
Timer 0 and 1 mode
89H
T1GATE
T1C/T
T1M1
T1M0
T0GATE
T0C/T
T0M1
T0M0
00
0000 0000
TOR2H
CCU reload register high
CFH
00
0000 0000
TOR2L
CCU reload register low
CEH
00
0000 0000
TPCR2H
Prescaler control register
high
CBH
------
TPCR2H.
1
TPCR2H.
0
00
xxxx xx00
TPCR2L
Prescaler control register low
CAH
TPCR2L.
7
TPCR2L.
6
TPCR2L.
5
TPCR2L.
4
TPCR2L.
3
TPCR2L.
2
TPCR2L.
1
TPCR2L.
0
00
0000 0000
TRIM
Internal oscillator trim register
96H
RCCLK
ENCLK
TRIM.5
TRIM.4
TRIM.3
TRIM.2
TRIM.1
TRIM.0
WDCON
Watchdog control register
A7H
PRE2
PRE1
PRE0
-
WDRUN
WDTOF
WDCLK
WDL
Watchdog load
C1H
FF
1111 1111
WFEED1
Watchdog feed 1
C2H
WFEED2
Watchdog feed 2
C3H
Table 3.
Special function registers …continued
* indicates SFRs that are bit addressable.
Name
Description
SFR
addr.
Bit functions and addresses
Reset value
MSB
LSB
Hex
Binary
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