參數(shù)資料
型號: P89LPC931
英文描述: 8-bit microcontrollers with two-clock 80C51 core 4 kB/8 kB 3 V Flash with 256-byte data RAM
中文描述: 8位微控制器兩個小時80C51的核心4 KB的/ 8 KB的256 3伏閃存內(nèi)存字節(jié)的數(shù)據(jù)
文件頁數(shù): 21/54頁
文件大?。?/td> 1015K
代理商: P89LPC931
Philips Semiconductors
P89LPC930/931
8-bit microcontrollers with two-clock 80C51 core
Product data
Rev. 03 — 06 October 2003
21 of 54
9397 750 12122
Koninklijke Philips Electronics N.V. 2003. All rights reserved.
P1.2 (SCL/T0) and P1.3 (SDA/INT0) may only be configured to be either input-only or
open-drain.
8.11.2
Quasi-bidirectional output configuration
Quasi-bidirectional outputs can be used as both an input and output without the need
to reconfigure the port. This is possible because when the port outputs a logic HIGH,
it is weakly driven, allowing an external device to pull the pin LOW. When the pin is
driven LOW, it is driven strongly and able to sink a fairly large current. These features
are somewhat similar to an open-drain output except that there are three pull-up
transistors in the quasi-bidirectional output that serve different purposes.
The P89LPC930/931 is a 3 V device, but the pins are 5 V-tolerant. In
quasi-bidirectional mode, if a user applies 5 V on the pin, there will be a current
flowing from the pin to V
DD
, causing extra power consumption. Therefore, applying
5 V in quasi-bidirectional mode is discouraged.
A quasi-bidirectional port pin has a Schmitt-triggered input that also has a glitch
suppression circuit.
8.11.3
Open-drain output configuration
The open-drain output configuration turns off all pull-ups and only drives the
pull-down transistor of the port driver when the port latch contains a logic ‘0’. To be
used as a logic output, a port configured in this manner must have an external
pull-up, typically a resistor tied to V
DD
.
An open-drain port pin has a Schmitt-triggered input that also has a glitch
suppression circuit.
8.11.4
Input-only configuration
The input-only port configuration has no output drivers. It is a Schmitt-triggered input
that also has a glitch suppression circuit.
8.11.5
Push-pull output configuration
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous
strong pull-up when the port latch contains a logic ‘1’. The push-pull mode may be
used when more source current is needed from a port output. A push-pull port pin
has a Schmitt-triggered input that also has a glitch suppression circuit.
8.11.6
Port 0 analog functions
The P89LPC930/931 incorporates two Analog Comparators. In order to give the best
analog function performance and to minimize power consumption, pins that are being
used for analog functions must have the digital outputs and digital inputs disabled.
Digital outputs are disabled by putting the port output into the Input-Only (high
impedance) mode as described in
Section 8.11.4
.
Digital inputs on Port 0 may be disabled through the use of the PT0AD register,
bits 1:5. On any reset, PT0AD1:5 defaults to ‘0’s to enable digital functions.
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