參數(shù)資料
型號: P87CL54X2BDH
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 80C51 8-bit microcontroller family
中文描述: 8-BIT, OTPROM, 33 MHz, MICROCONTROLLER, PDSO38
封裝: 4.40 MM, 0.50 MM PITCH, PLASTIC, SHRINK, SOT-510-1, TSSOP-38
文件頁數(shù): 12/47頁
文件大?。?/td> 301K
代理商: P87CL54X2BDH
Philips Semiconductors
Product data
P87CL52X2/54X2
80C51 8-bit microcontroller family
8K/16K OTP 256 bytes RAM ROMless low voltage
(1.8 V to 3.3 V), low power, high speed (33 MHz)
2003 May 14
12
TL0
(8 Bits)
TF0
Interrupt
Control
TH0
(8 Bits)
TF1
Interrupt
Control
TR1
INT0 Pin
Timer 0
Gate bit
TR0
SU01620
C/T = 0
C/T = 1
*d = 6 in 6-clock mode; d = 12 in 12-clock mode.
OSC
÷
d*
OSC
÷
d*
T0 Pin
Figure 5. Timer/Counter 0 Mode 3: Two 8-Bit Counters
TIMER 2 OPERATION
Timer 2
Timer 2 is a 16-bit Timer/Counter which can operate as either an
event timer or an event counter, as selected by C/T2* in the special
function register T2CON (see Figure 1). Timer 2 has three operating
modes:Capture, Auto-reload (up or down counting) ,and Baud Rate
Generator, which are selected by bits in the T2CON as shown in
Table 3.
Capture Mode
In the capture mode there are two options which are selected by bit
EXEN2 in T2CON. If EXEN2 = 0, then timer 2 is a 16-bit timer or
counter (as selected by C/T2* in T2CON) which, upon overflowing
sets bit TF2, the timer 2 overflow bit. This bit can be used to
generate an interrupt (by enabling the Timer 2 interrupt bit in the
IE register). If EXEN2 = 1, Timer 2 operates as described above, but
with the added feature that a 1- to -0 transition at external input
T2EX causes the current value in the Timer 2 registers, TL2 and
TH2, to be captured into registers RCAP2L and RCAP2H,
respectively. In addition, the transition at T2EX causes bit EXF2 in
T2CON to be set, and EXF2 like TF2 can generate an interrupt
(which vectors to the same location as Timer 2 overflow interrupt.
The Timer 2 interrupt service routine can interrogate TF2 and EXF2
to determine which event caused the interrupt). The capture mode is
illustrated in Figure 2 (There is no reload value for TL2 and TH2 in
this mode. Even when a capture event occurs from T2EX, the
counter keeps on counting T2EX pin transitions or osc/12 pulses.).
Auto-Reload Mode (Up or Down Counter)
In the 16-bit auto-reload mode, Timer 2 can be configured (as either
a timer or counter (C/T2* in T2CON)) then programmed to count up
or down. The counting direction is determined by bit DCEN (Down
Counter Enable) which is located in the T2MOD register (see
Figure 3). When reset is applied the DCEN = 0 which means Timer
2 will default to counting up. If DCEN bit is set, Timer 2 can count up
or down depending on the value of the T2EX pin.
Figure 4 shows Timer 2 which will count up automatically since
DCEN = 0. In this mode there are two options selected by bit
EXEN2 in T2CON register. If EXEN2 = 0, then Timer 2 counts up to
0FFFFH and sets the TF2 (Overflow Flag) bit upon overflow. This
causes the Timer 2 registers to be reloaded with the 16-bit value in
RCAP2L and RCAP2H. The values in RCAP2L and RCAP2H are
preset by software means.
If EXEN2 = 1, then a 16-bit reload can be triggered either by an
overflow or by a 1-to-0 transition at input T2EX. This transition also
sets the EXF2 bit. The Timer 2 interrupt, if enabled, can be
generated when either TF2 or EXF2 are 1.
In Figure 5 DCEN = 1 which enables Timer 2 to count up or down.
This mode allows pin T2EX to control the direction of count. When a
logic 1 is applied at pin T2EX Timer 2 will count up. Timer 2 will
overflow at 0FFFFH and set the TF2 flag, which can then generate
an interrupt, if the interrupt is enabled. This timer overflow also
causes the 16–bit value in RCAP2L and RCAP2H to be reloaded
into the timer registers TL2 and TH2.
When a logic 0 is applied at pin T2EX this causes Timer 2 to count
down. The timer will underflow when TL2 and TH2 become equal to
the value stored in RCAP2L and RCAP2H. Timer 2 underflow sets
the TF2 flag and causes 0FFFFH to be reloaded into the timer
registers TL2 and TH2.
The external flag EXF2 toggles when Timer 2 underflows or
overflows. This EXF2 bit can be used as a 17th bit of resolution if
needed. The EXF2 flag does not generate an interrupt in this mode
of operation.
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