參數(shù)資料
型號(hào)： P80L42
廠商： INTEL CORP
元件分類： 微控制器/微處理器
英文描述： UNIVERSAL PERIPHERAL INTERFACE CHMOS 8-BIT SLAVE MICROCONTROLLER
中文描述： 8-BIT, MROM, 0.833 MHz, MICROCONTROLLER, PDIP40
封裝： PLASTIC, DIP-40
文件頁數(shù)： 20/25頁
文件大?。?/td> 305K
代理商： P80L42
UPI-C42/UPI-L42
DRIVING FROM AN EXTERNAL SOURCE
290414–18
NOTE:
See XTAL1 Configuration Table.
290414–19
Rise and Fall Times Should Not
Exceed 10 ns. Resistors to V
CC
are Needed to Ensure V
IH
e
3.5V
if TTL Circuitry is Used.
LC OSCILLATOR MODE
L
C
NOMINAL
5.2 MHz
3.2 MHz
f
e
1
2
q
0
LC
ê
45 H 20 pF
120 H 20 pF
C
ê
e
C
a
3Cpp
2
Cpp
j
5–10 pF
Pin-to-Pin Capacitance
290414–20
Each C Should be Approximately 20 pF, including Stray Capacitance.
CRYSTAL OSCILLATOR MODE
290414–21
C1
C2
C3
5 pF (STRAY 5 pF)
(CRYSTAL
a
STRAY) 8 pF
20–30 pF INCLUDING STRAY
Crystal Series Resistance Should
be Less Than 30
X
at 12.5 MHz.
XTAL1 Configuration Table
XTAL1 Connection
1) to Ground
2) 10 K
X
Resistor
to Ground
3) Not Connected
Not recommended for CHMOS
designs. Causes approximately
16 mA of additional current flow
through the XTAL1 pin on UPI-
C42 and approximately 11 mA of
additional current through XTAL1
on the UPI-L42.
Recommended configuration for
designs which will use both
NMOS and CHMOS parts. This
configuration limits the additional
current through the XTAL1 pin to
approximately 1 mA, while
maintaining compatibility with the
NMOS device.
Low power configuration
recommended for CHMOS only
designs to provide lowest
possible power consumption.
This configuration will not work
with the NMOS device.
20
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