參數(shù)資料
型號: P4C1258-35JI
廠商: PYRAMID SEMICONDUCTOR CORP
元件分類: DRAM
英文描述: ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM
中文描述: 64K X 4 STANDARD SRAM, 35 ns, PDSO24
封裝: 0.300 INCH, PLASTIC, SOJ-24
文件頁數(shù): 1/9頁
文件大?。?/td> 185K
代理商: P4C1258-35JI
1
Document #
SRAM123
REV OR
Revised October 2005
DESCRIPTION
The P4C1258 is a 262,144-bit ultra high speed static RAM
organized as 64K x 4. The CMOS memory requires no clock
or refreshing and has equal access and cycle times. Inputs
and outputs are fully TTL-compatible. The RAM operates
from a single 5V±10% tolerance power supply. With battery
backup, data integrity is maintained for supply voltages
down to 2.0V. Current drain is typically 10 μA from a 2.0V
supply.
Three-State Outputs
TTL/CMOS Compatible Outputs
Fully TTL Compatible Inputs
Standard Pinout (JEDEC Approved)
– 24-Pin 300 mil DIP, SOJ
FEATURES
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 15/20/25/35 ns (Commercial/Industrial)
Low Power
Single 5V±10% Power Supply
Data Retention with 2.0V Supply
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
P4C1258
ULTRA HIGH SPEED 64K x 4
STATIC CMOS RAM
DIP (P4)
SOJ (J4)
Access times as fast as 15 nanoseconds are available,
permitting greatly enhanced system speeds. CMOS is
utilized to reduce power consumption.
The P4C1258 is available in a 24-pin 300 mil DIP or SOJ
packages providing excellent board level densities.
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