參數(shù)資料
型號: P2103ACRP
英文描述: SIDAC|250V V(BO) MAX|800MA I(S)|TO-220VAR
中文描述: SIDAC的| 250V五(公報)最大| 800mA的我(縣)|對220VAR
文件頁數(shù): 121/161頁
文件大?。?/td> 986K
代理商: P2103ACRP
SIDACtor
Data Book
SIDACtor Selection Criteria
Teccor Electronics
(972) 580-7777
5 - 5
T
$%$
When selecting a SIDACtor, the following criteria should be used:
Off-state Voltage (V
DRM
)
The V
DRM
of the SIDACtor must be greater than the maximum operating voltage of the
circuit that the SIDACtor is protecting.
Example 1: For a POTS (Plain Old Telephone Service) application, convert the maximum
operating ring voltage (150V
RMS
) to a peak voltage and add the maximum DC bias
of the central office battery:
150V
RMS
2 + 56.6V
PK
= 268.8V
PK
V
DRM
>268.8V
Example 2: For an ISDN application, add the maximum voltage of the DC power supply to the
maximum voltage of the transmission signal:
150V
PK
+ 3V
PK
= 153V
PK
V
DRM
>153V
Switching Voltage (V
S
)
The V
S
of the SIDACtor should be equal to or less than the instantaneous peak
voltage rating of the component it is protecting.
Example 1: V
S
V
Relay Breakdown
Example 2: V
S
SLIC V
PK
Peak Pulse Current (I
PP
)
For circuits that do not require additional series resistance, the surge current rating
(I
PP
) of the SIDACtor should be greater than or equal to the surge currents associated
with the lightning immunity tests of the applicable regulatory requirement (I
PK
).
I
PP
I
PK
For circuits that utilize additional series resistance, the surge current rating (I
PP
) of the
SIDACtor should be greater than or equal to the
available
surge currents associated
with the lightning immunity tests of the applicable regulatory requirement (I
PK(available)
).
I
PP
I
PK(available)
The maximum available surge current is calculated by dividing the peak surge voltage
(V
PK
) by the total circuit resistance (R
TOTAL
).
I
PK(available)
= V
PK
/R
TOTAL
For longitudinal surges (TIP-GND, RING-GND), R
TOTAL
is calculated for both TIP and
RING.
R
SOURCE
= V
PK
/I
PK
R
TOTAL
= R
TIP
+ R
SOURCE
R
TOTAL
= R
RING
+ R
SOURCE
相關PDF資料
PDF描述
P2300EA MCU CMOS 44 LD 16MHZ 4K EPRM, 0C to +70C, 44-TQFP, TRAY
P2300EARP1 MCU CMOS 40 LD 16MHZ 4K EPRM, -40C to +85C, 40-PDIP, TUBE
P2300EARP2 MCU CMOS 40 LD 25MHZ 4K EPRM, 0C to +70C, 40-PDIP, TUBE
P2300EB MCU CMOS 44 LD 25MHZ 4K EPRM, 0C to +70C, 44-TQFP, TRAY
P2300EBRP1 MCU CMOS 44 LD 25MHZ 4K EPRM, -40C to +85C, 44-TQFP, TRAY
相關代理商/技術參數(shù)
參數(shù)描述
P2103HVG 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Dual N-Channel Enhancement Mode Field Effect Transistor
P2103NV 制造商:未知廠家 制造商全稱:未知廠家 功能描述:N- & P-Channel Enhancement Mode Field Effect Transistor
P2103NVG 制造商:未知廠家 制造商全稱:未知廠家 功能描述:N- & P-Channel Enhancement Mode Field Effect Transistor
P2103U 制造商:TECCOR 制造商全稱:TECCOR 功能描述:solid state crowbar devices
P2103U_L 制造商:LITTELFUSE 制造商全稱:Littelfuse 功能描述:Balanced Three-chip SIDACtor