參數(shù)資料
型號: OXFW911
廠商: Electronic Theatre Controls, Inc.
英文描述: IEEE1394 to ATA/ATAPI Native Bridge
中文描述: IEEE1394連接到ATA / ATAPI的母語橋
文件頁數(shù): 11/32頁
文件大?。?/td> 141K
代理商: OXFW911
Data Sheet Rev 1.1
Page 11
OXFW911
OXFORD SEMICONDUCTOR LTD.
Symbol
Parameter
Mode 3
min
100
Mode 3
max
Mode 4
min
60
Mode4
max
Mode5
mn
40
Mode5
max
Unit
s
ns
t2cyctyp
Typical sustained average two
cycle time
Cycle time allowing for clock
variations ( refer to ATA spec)
Two cycle time allowing for clock
variations ( refer to ATA spec )
Data setup time at recipient
Data hold time at recipient
Data valid setup time at sender
(fromdata bus being valid until
STROBE edge )
Data valid hold time at sender
(fromSTROBE edge until data
may become invalid
First STROBE time (for device to
first
negate
DSTROBE
STOP during a data-in burst)
Limted interlock time
Interlock time with mnimum
Unlimted interlock time
Maximumtime allowed for output
drivers to release (frombeing
asserted or negated)
Mnimumdelay time required for
output drivers to assert or negate
(fromreleased state)
Envelope time ( fromDMACK#to
STOP and HDMARDY# during
data-out burst initiation
Ready-to-final-STROBE time ( no
STROBE edges shall be sent this
long
after
the
DDMARDY#
Ready-to-pause time ( time that
recipient shall wait to initiate
pause after negating DMARDY#)
Pull-up
time
before
IORDY to be released
Mnimumtime a device shall wait
before driving IORDY
Setup
and
hold
DMACK#(before assertion or
negation )
Time fromSTROBE edge to
negation of DMARQ or assertion
of STOP (when sender termnates
a burst )
tcyc
39
25
20
ns
t2cyc
86
57
40
ns
tds
tdh
tdvs
7
5
20
5
5
6
4.0
4.6
4.8
ns
ns
ns
tdvh
6
6
4.8
ns
tfs
from
0
130
0
120
0
90
ns
tli
tmi
tui
taz
0
20
0
100
10
0
20
0
100
10
0
75
20
0
10
ns
ns
ns
ns
tzah
tzad
20
0
20
0
20
0
ns
tenv
20
55
20
55
20
50
ns
trfs
negation
of
60
60
50
ns
trp
100
100
85
ns
tiordyz
allowing
20
20
20
ns
tziordy
0
0
0
ns
tack
times
for
20
20
20
ns
tss
50
50
50
ns
Table 7a: OXFW911 Ultra DMA timings (cont)
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