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參數(shù)資料
| 型號： | OV7620 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | OV7620 SINGLE-CHIP CMOS VGA COLOR DIGITAL CAMERA |
| 中文描述： | OV7620的單芯片CMOS VGA彩色數(shù)碼相機 |
| 文件頁數(shù)： | 17/60頁 |
| 文件大?。?/td> | 313K |
| 代理商： | OV7620 |
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OV7620 Product Specifications - Rev. 1.2 (5/13/00)
OMNIVISION TECHNOLOGIES INC.
17
Preliminary
Company Confidential
Note: In Interlaced Mode, there are Even/Odd field different (t8). When In Progressive Scan Mode, only
frame timing same as Even field(t8).
After
VSYNC
falling edge, OV7620 will output black reference level, the line number is
Tvs
,
which is the line number between the 1st
HREF
rising edge after
VSYNC
falling edge and 1st
valid data
CHSYNC
rising edge. Then valid data, then black reference, line number is
Tve
, which
is the line number between last valid data
CHSYNC
rising edge and 1st
CHSYNC
rising edge
after
VSYNC
rising edge. The black reference output line number is dependent on vertical win-
dow setting.
When in default setting,
Tvs
= 14*
Tline
, which is changed with register register 19<7:0>. If in
Interlaced Mode
, register 19<7:0> change 1 step,
Tvs
increase 1 line. If in
Progressive Scan
Mode
, register 19<7:0> step equal to 2 line.
When in default setting,
Tve
= 4*
Tline
for
Odd
Field,
Tve
= 3*
Tline
for
Even
Field, which is
changed with register register 1A<7:0>. If in
Interlaced Mode
, register 1A<7:0> change 1 step,
Tve
increase 1 line. If in
Progressive Scan Mode
, register 1A<7:0> step equal to 2 line.
In
Progressive Scan Mode
,
Tve
= 3*
Tline
and
Tvs
= 35*
Tline
.
Table 1.4: ZV Port AC Parameter
Symbol
Parameter
Min.
Max.
t1
PCLK fall timing
4 ns
8 ns
t2
PCLK low time
30 ns
t3
PCLK rise time
4 ns
8 ns
t4
PCLK high time
30 ns
t5
PCLK period
74 ns
t6
Y/UV/HREF setup time
10 ns
t7
Y/UV/HREF hold time
20 ns
t8
VSYNC setup/hold time to HREF
1 us
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