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參數(shù)資料
| 型號： | ORT4622BM680 |
| 廠商： | LATTICE SEMICONDUCTOR CORP |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 504 CLBS, 60000 GATES, PBGA680 |
| 封裝： | PLASTIC, BGA-680 |
| 文件頁數(shù)： | 1/90頁 |
| 文件大小： | 1464K |
| 代理商： | ORT4622BM680 |
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Preliminary Data Sheet
January 2002
ORCA ORT4622 Field-Programmable System Chip (FPSC)
Four-Channel x 622 Mbits/s Backplane Transceiver
Introduction
Lattice has developed a solution for designers who
need the many advantages of FPGA-based design
implementation, coupled with high-speed serial back-
plane data transfer. The 622 Mbits/s backplane trans-
ceiver offers a clockless, high-speed interface for
interdevice communication on a board or across a
backplane. The built-in clock recovery of the
ORT4622 allows for higher system performance,
easier-to-design clock domains in a multiboard sys-
tem, and fewer signals on the backplane. Network
designers will benet from the backplane transceiver
as a network termination device. The backplane
transceiver offers SONET scrambling/descrambling
of data and streamlined SONET framing, pointer
moving, and transport overhead handling, plus the
programmable logic to terminate the network into
proprietary systems. For non-SONET applications,
all SONET functionality is hidden from the user and
no prior networking knowledge is required.
Embedded Core Features
■
Implemented in an ORCA Series 3 FPGA array.
■
Allows wide range of applications for SONET net-
work termination application as well as generic data
moving for high-speed backplane data transfer.
■
No knowledge of SONET/SDH needed in generic
applications. Simply supply data, 78 MHz clock, and
a frame pulse.
■
High-speed interface (HSI) function for clock/data
recovery serial backplane data transfer without
external clocks.
■
HSI function uses Lattice’s proven 622 Mbits/s
serial interface core.
■
Four-channel HSI function provides 622 Mbits/s
serial interface per channel for a total chip band-
width of 2.5 Gbits/s (full duplex).
■
LVDS I/Os compliant with EIA*-644, support hot
insertion.
■
8:1 data multiplexing/demultiplexing for 77.76 MHz
byte-wide data processing in FPGA logic.
■
On-chip phase-lock loop (PLL) clock meets B jitter
tolerance specication of ITU-T Recommendation
G.958 (0.6
UIP-P at 250 kHz).
■
Powerdown option of HSI receiver on a per-
channel basis.
■
Highly efcient implementation with only 3% over-
head vs. 25% for 8B10B coding.
■
In-Band management and conguration.
■
Streamlined pointer processor (pointer mover) for
8 kHz frame alignment to system clocks.
■
Built-in boundry scan (IEEE 1149.1 JTAG).
■
FIFOs align incoming data across all four channels
for STS-48 (2.5 Gbits/s) operation (in quad STS-12
format).
■
1 + 1 protection supports STS-12/STS-48 redun-
dancy by either software or hardware control for
protection switching applications.
* EIA is a registered trademark of Electronic Industries Associa-
tion.
IEEE is a registered trademark of The Institute of Electrical and
Electronics Engineers, Inc.
Table 1. ORCA ORT4622—Available FPGA Logic
The embedded core and interface are not included in the above gate counts. The usable gate count range from a logic-only gate count to
a gate count assuming 30% of the PFUs/SLICs being used as RAMs. The logic-only gate count includes each PFU/SLIC (counted as
108 gates per PFU/SLIC), including 12 gates pre-LUT/FF pair (eight per PFU), and 12 gates per SLC/FF pair (one per PFU). Each of the
four PIOs per PIC is counted as 16 gates (two FFs, fast-capture latch, output logic, CLK drivers, and I/O buffers). PFUs used as RAM are
counted at four gates per bit, with each PFU capable of implementing a 32 x 4 RAM (or 512 gates) per PFU.
Device
Usable
System
Gates
Number of
LUTs
Number of
Registers
Max User
RAM
Max User
I/Os
Array Size
Number of
PFUs
ORT4622
60K—120K
4032
5304
64K
259
18 x 28
504
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| ORT551 | 制造商:Hasco Components International Corp 功能描述: |
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| ORT551/10-15 AT | 功能描述:磁性/簧片開關(guān) 1 Form C 14mm AT 1015 OKI RoHS:否 制造商:MEDER electronic (Standex) 開關(guān)類型:Reed 觸點形式:1 Form A (SPST-NO) 觸點額定值:10 VA 操作范圍:10 At to 50 At 工作間隙: 磁鐵類型: 顏色: 端接類型:Axial 封裝:Bulk |
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| ORT551-1015 | 功能描述:磁性/簧片開關(guān) Reed Switch, 1 Form C, SPST-NC, 14mm AT 1015 OKI RoHS:否 制造商:MEDER electronic (Standex) 開關(guān)類型:Reed 觸點形式:1 Form A (SPST-NO) 觸點額定值:10 VA 操作范圍:10 At to 50 At 工作間隙: 磁鐵類型: 顏色: 端接類型:Axial 封裝:Bulk |
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