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參數(shù)資料
| 型號： | OPA734AIDR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | SINGLE-SUPPLY CMOS OPERATIONAL AMPLIFIERS Zero-Drift Series |
| 中文描述： | 單電源CMOS運(yùn)算放大器零漂移系列 |
| 文件頁數(shù)： | 9/18頁 |
| 文件大?。?/td> | 469K |
| 代理商： | OPA734AIDR |
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SBOS282A DECEMBER 2003 REVISED FEBRUARY 2004
www.ti.com
9
Low-gain (< 20) operation demands that the auto-zero
circuitry correct for common-mode rejection errors of the
main amplifier. Because these errors can be larger than
0.1% of a full-scale input step change, one calibration
cycle (100
μ
s) can be required to achieve full accuracy.
The term
clock feedthrough
describes the presence of the
clock frequency in the output spectrum. In auto-zeroed op
amps, clock feedthrough may result from the settling of the
internal sampling capacitor, or from the small amount of
charge injection that occurs during the sample-and-hold of
the op amp offset voltage. Feedthrough can be minimized
by keeping the source impedance relatively low (< 1k
)
and matching the source impedance on both input
terminals. If the source resistance is high (> 1k
)
feedthrough can generally be reduced with a capacitor of
1nF or greater in parallel with the source or feedback
resistors. See the circuit application examples.
LAYOUT GUIDELINES
Attention to good layout practices is always recom-
mended. Keep traces short. When possible, use a PCB
ground plane with surface-mount components placed as
close to the device pins as possible. Place a 0.1
μ
F
capacitor closely across the supply pins. These guidelines
should be applied throughout the analog circuit to improve
performance and provide benefits such as reducing the
electromagnetic-interference (EMI) susceptibility.
R
1
V
EX
V
OUT
V
REF
R
1
OPA734
R
R
R
R
+10V
1nF
1nF
Figure 2. Single Op Amp Bridge Amplifier Circuit
1/2
OPA2735
R
3
10k
R
3
10k
R
1
1k
1/2
OPA2735
R
2
1k
C
4
1nF
C
4
1nF
R
G
10V
C
1(1)
1nF
C
2(1)
10nF
C
3(1)
1nF
V
REF
= 15V
2
4
6
REF102
NOTE: (1) Place close to input pins.
R
R
R R
G = 1 + 2
R
3
R
G
Figure 3. Differential Output Bridge Amplifier
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OPA734AIDRG4 | 功能描述:運(yùn)算放大器 - 運(yùn)放 0.05uV/degC Single- Supply CMOS RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| OPA735 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:0.03-uV/C Drift, Low-Noise, Rail-to-Rail Output, 36-V, Zero-Drift OPERATIONAL AMPLIFIERS |
| OPA735AID | 功能描述:運(yùn)算放大器 - 運(yùn)放 0.05uV/dgC Sngl-Sply CMOS 0-Drift Ser RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| OPA735AID | 制造商:Texas Instruments 功能描述:OP AMP CMOS ZERO DRIFT SMD SOIC8 |
| OPA735AIDBVR | 功能描述:運(yùn)算放大器 - 運(yùn)放 0.05uV/dgC Sngl-Sply CMOS 0-Drift Ser RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
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