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參數(shù)資料
| 型號(hào)： | OP634 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Wideband, Single-Supply Operational Amplifier(寬帶,單電源運(yùn)算放大器) |
| 中文描述： | 寬帶，單電源運(yùn)算放大器（寬帶，單電源運(yùn)算放大器） |
| 文件頁(yè)數(shù)： | 13/18頁(yè) |
| 文件大?。?/td> | 284K |
| 代理商： | OP634 |
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OPA634, OPA635
SBOS097A
13
DESIGN-IN TOOLS
DEMONSTRATION BOARDS
Two PC boards are available to assist in the initial evaluation
of circuit performance using the OPA634 and OPA635 in
their three package styles. These are available free as an
unpopulated PC board delivered with descriptive documen-
tation. The summary information for these boards is shown
in Table I.
BANDWIDTH VERSUS GAIN: NON-INVERTING OPERATION
Voltage feedback op amps exhibit decreasing closed-loop
bandwidth as the signal gain is increased. In theory, this
relationship is described by the Gain Bandwidth Product
(GBP) shown in the specifications. Ideally, dividing GBP by
the non-inverting signal gain (also called the Noise Gain, or
NG) will predict the closed-loop bandwidth. In practice, this
only holds true when the phase margin approaches 90
°
, as it
does in high gain configurations. At low gains (increased
feedback factors), most amplifiers will exhibit a more com-
plex response with lower phase margin. The OPA634 and
OPA635 are compensated to give a slightly peaked response
in a non-inverting gain of 2 (Figure 1). This results in a
typical gain of +2 bandwidth of 150MHz, far exceeding that
predicted by dividing the 140MHz GBP by 2. Increasing the
gain will cause the phase margin to approach 90
°
and the
bandwidth to more closely approach the predicted value of
(GBP/NG). At a gain of +10, the 16MHz bandwidth shown
in the Typical Specifications is close to that predicted using
the simple formula and the typical GBP.
The OPA634 and OPA635 exhibit minimal bandwidth re-
duction going to +3V single supply operation as compared
with +5V supply. This is because the internal bias control
circuitry retains nearly constant quiescent current as the total
supply voltage between the supply pins is changed.
INVERTING AMPLIFIER OPERATION
Since the OPA634 and OPA635 are general-purpose, wideband
voltage- feedback op amps, all of the familiar op amp appli-
cation circuits are available to the designer. Figure 5 shows a
typical inverting configuration where the I/O impedances and
signal gain from Figure 1 are retained in an inverting circuit
configuration. Inverting operation is one of the more common
requirements and offers several performance benefits. The
inverting configuration shows improved slew rate and distor-
tion. It also allows the input to be biased at V
S
/2 without any
headroom issues. The output voltage can be independently
moved to be within the output voltage range with coupling
capacitors, or bias adjustment resistors.
BOARD
PART
NUMBER
LITERATURE
REQUEST
NUMBER
PRODUCT
PACKAGE
OPA63xU
OPA63xN
SO-8
SOT23-5
SOT23-6
DEM-OPA68xU
DEM-OPA6xxN
"
MKT-351
MKT-348
"
"
TABLE I. Demo Board Summary Information.
Contact the Texas Instruments Technical Applications Sup-
port Line at 1-972-644-5580 to request any of these boards.
OPERATING SUGGESTIONS
OPTIMIZING RESISTOR VALUES
Since the OPA634 and OPA635 are voltage feedback op
amps, a wide range of resistor values may be used for the
feedback and gain setting resistors. The primary limits on
these values are set by dynamic range (noise and distortion)
and parasitic capacitance considerations. For a non-inverting
unity gain follower application, the feedback connection
should be made with a 20
resistor, not a direct short (see
Figure 4 with R
G
=
∞
). This will isolate the inverting input
capacitance from the output pin and improve the frequency
response flatness. Usually, for G > 1 application, the feed-
back resistor value should be between 200
and 1.5k
.
Below 200
, the feedback network will present additional
output loading which can degrade the harmonic distortion
performance. Above 1.5k
, the typical parasitic capacitance
(approximately 0.2pF) across the feedback resistor may
cause unintentional band-limiting in the amplifier response.
A good rule of thumb is to target the parallel combination of
R
F
and R
G
(Figure 1) to be less than approximately 400
.
The combined impedance R
F
|| R
G
interacts with the invert-
ing input capacitance, placing an additional pole in the
feedback network and thus, a zero in the forward response.
Assuming a 3pF total parasitic on the inverting node, hold-
ing R
F
|| R
G
<400
will keep this pole above 130MHz. By
itself, this constraint implies that the feedback resistor R
F
can increase to several k
at high gains. This is acceptable
as long as the pole formed by R
F
and any parasitic capaci-
tance appearing in parallel is kept out of the frequency range
of interest.
FIGURE 5. AC-Coupled, Gain of –2 Example Circuit.
OPA63x
50
R
F
750
R
G
374
2R
T
1.5k
R
57.6
Source
DIS
+5V
2R
T
1.5k
R
O
50
0.1
μ
F
6.8
μ
F
+
0.1
μ
F
0.1
μ
F
50
Load
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