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參數(shù)資料
| 型號(hào)： | OP634 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Wideband, Single-Supply Operational Amplifier(寬帶,單電源運(yùn)算放大器) |
| 中文描述： | 寬帶，單電源運(yùn)算放大器（寬帶，單電源運(yùn)算放大器） |
| 文件頁(yè)數(shù)： | 12/18頁(yè) |
| 文件大小： | 284K |
| 代理商： | OP634 |
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OPA634, OPA635
SBOS097A
12
DC LEVEL SHIFTING
Figure 3 shows a DC-coupled non-inverting amplifier that
level-shifts the input up to accommodate the desired output
voltage range. Given the desired signal gain (G), and the
amount V
OUT
needs to be shifted up (
V
OUT
) when V
IN
is at
the center of its range, the following equations give the
resistor values that produce the desired performance. Start
by setting R
4
between 200
and 1.5k
.
NG = G +
V
OUT
/V
S
R
1
= R
4
/G
R
2
= R
4
/(NG – G)
R
3
= R
4
/(NG –1)
where:
NG = 1 + R
4
/R
3
V
OUT
= (G)V
IN
+ (NG – G)V
S
Make sure that V
IN
and V
OUT
stay within the specified input
and output voltage ranges.
NON-INVERTING AMPLIFIER WITH
REDUCED PEAKING
Figure 4 shows a non-inverting amplifier that reduces peak-
ing at low gains. The resistor R
C
compensates the OPA634
or OPA635 to have higher Noise Gain (NG), which reduces
the AC response peaking (typically 5dB at G = +1 without
R
C
) without changing the DC gain. V
IN
needs to be a low
impedance source, such as an op amp. The resistor values
are low to reduce noise. Using both R
T
and R
F
helps
minimize the impact of parasitic impedances.
OPA63x
+V
S
V
OUT
V
IN
R
3
R
2
R
1
R
4
FIGURE 3. DC Level-Shifting Circuit.
OPA63x
V
OUT
V
IN
R
G
R
T
R
F
R
C
FIGURE 4. Compensated Non-Inverting Amplifier.
The front page circuit is a good example of this type
of application. It was designed to take V
IN
between
0V and 0.5V, and produce V
OUT
between 1V and 2V,
when using a +3V supply. This means G = 2.00, and
V
OUT
= 1.50V – G 0.25V = 1.00V. Plugging into the
above equations (with R
4
= 750
) gives: NG = 2.33,
R
1
= 375
, R
2
= 2.25k
, and R
3
= 563
. The resistors
were changed to the nearest standard values.
The Noise Gain can be calculated as follows:
G
R
R
R
G
R
R
G
NG
G G
F
G
T
F
C
1
2
1
2
1
1
= +
= +
+
=
/
A unity gain buffer can be designed by selecting R
T
= R
F
=
20.0
and R
C
= 40.2
(do not use R
G
). This gives a Noise
Gain of 2, so its response will be similar to the Characteris-
tics Plots with G = +2. Decreasing R
C
to 20.0
will increase
the Noise Gain to 3, which typically gives a flat frequency
response, but with less bandwidth.
The circuit in Figure 1 can be redesigned to have less
peaking by increasing the noise gain to 3. This is accom-
plished by adding R
C
= 2.55k
between the op amps inputs.
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