參數(shù)資料
型號: OM13032,598
廠商: NXP Semiconductors
文件頁數(shù): 28/74頁
文件大?。?/td> 0K
描述: BOARD EVAL LPC11U24
標準包裝: 1
類型: MCU
適用于相關產品: LPC11U24
所含物品:
其它名稱: 568-8599
LPC11U2X
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2014. All rights reserved.
Product data sheet
Rev. 2.2 — 11 March 2014
34 of 74
NXP Semiconductors
LPC11U2x
32-bit ARM Cortex-M0 microcontroller
[1]
The ADC is monotonic, there are no missing codes.
[2]
The differential linearity error (ED) is the difference between the actual step width and the ideal step width. See Figure 8.
[3]
The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See Figure 8.
[4]
The offset error (EO) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See Figure 8.
[5]
The gain error (EG) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See Figure 8.
[6]
The absolute error (ET) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
ADC and the ideal transfer curve. See Figure 8.
[7]
Tamb = 25 C; maximum sampling frequency fs = 400 kSamples/s and analog input capacitance Cia = 1 pF.
[8]
Input resistance Ri depends on the sampling frequency fs: Ri = 1 / (fs Cia).
Table 6.
ADC static characteristics
Tamb = 40 C to +85 C unless otherwise specified; ADC frequency 4.5 MHz, VDD = 2.5 V to 3.6 V.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIA
analog input voltage
0
-
VDD
V
Cia
analog input capacitance
-
1
pF
ED
differential linearity error
1LSB
EL(adj)
integral non-linearity
1.5
LSB
EO
offset error
3.5
LSB
EG
gain error
[5] --0.6
%
ET
absolute error
4LSB
Rvsi
voltage source interface
resistance
--40
k
Ri
input resistance
[7][8] --2.5
M
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