參數(shù)資料
型號: OL2381AHN
廠商: NXP Semiconductors N.V.
元件分類: 微波射頻器件
英文描述: Highly Integrated Single Chip Sub 1-GHz RF Transceiver
封裝: OL2381AHN<SOT617-3 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-3.html<1<Always Pb-free,;
文件頁數(shù): 40/43頁
文件大?。?/td> 2978K
代理商: OL2381AHN
AN11017
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Application note
Rev. 2 — 10 May 2011
40 of 43
NXP Semiconductors
AN11017
Transceiver OL2381 using wireless M-BUS
The OL2381 implements all calibrations automatically in these examples.
Take care when writing to addresses 0x0C, 0x18, bank 0 and 0x2F, 0x30, 0x34, 0x39
bank 1. These writes can start calibration processes or change calibration data. The best
solution is not to write to these addresses in simple applications.
In time-critical applications where the time between RX and TX is important, the
calibration can be skipped. In this case, the user must handle the calibration.
To obtain the repeatable register settings shown in
Figure 41
to
Figure 45
, the following
steps are executed:
write all OL2381 registers to 0x00
reset OL2381 by writing 0x01 to register 0x13 (this puts most registers into the default
state, the remainder stay at 0x00)
program the registers described in
Section 4
to
Section 6
Fig 44. OL2381 register settings for R-mode
Fig 45. OL2381 register settings for F-mode
019aab796
; x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xa xb xc xd xe xf
; visible in bank 0,1
01_0x = d0 03 b2 00 00 00 00 00 00 00 00 00 20 00 d5 61
01_1x = 28 04 66 00 00 01 ff 00 04 01 2c 00 1f 00 00 00
01_2x = 40 f0 55 00 78 00 00 45 00 00 68 00 00 00 -- --
01_3x = -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 00
; visible in bank 0
0_2x = -- -- -- -- -- -- -- -- -- -- -- -- -- -- 00 00
0_3x = 00 00 00 00 00 2c 8c 00 00 00 00 96 76 54 55 --
; visible in bank 1
1_2x = -- -- -- -- -- -- -- -- -- -- -- -- -- -- 80 00
1_3x = 00 02 49 02 00 60 00 00 00 00 00 00 00 00 00 –
019aab797
; x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xa xb xc xd xe xf
; visible in bank 0,1
01_0x = e0 d1 b1 00 00 00 00 00 00 00 00 00 20 01 d5 69
01_1x = 28 05 66 00 00 01 ff 00 04 01 17 00 1f 00 00 00
01_2x = 40 f0 55 00 78 00 00 46 00 00 68 00 00 00 -- --
01_3x = -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 00
; visible in bank 0
0_2x = -- -- -- -- -- -- -- -- -- -- -- -- -- -- 00 00
0_3x = 00 00 00 00 00 29 8c 00 00 00 1a 96 3a aa aa --
; visible in bank 1
1_2x = -- -- -- -- -- -- -- -- -- -- -- -- -- -- 80 00
1_3x = 00 02 49 02 00 60 00 00 00 00 00 00 00 00 00 --
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