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參數(shù)資料
| 型號(hào)： | NT512T64U88B0BY-3C |
| 廠商： | NANYA TECHNOLOGY CORP |
| 元件分類： | DRAM |
| 英文描述： | 64M X 64 DDR DRAM MODULE, 0.5 ns, DMA240 |
| 封裝： | ROHS COMPLIANT, DIMM-240 |
| 文件頁數(shù)： | 3/24頁 |
| 文件大小： | 473K |
| 代理商： | NT512T64U88B0BY-3C |
NT256T64UH4B0FY / NT512T64U88B0BY / NT1GT64U8HB0BY
256MB: 32M x 64 / 512MB: 64M x 64 / 1GB: 128M x 64
Unbuffered DDR2 SDRAM DIMM
REV 1.2
11
03/2007
NANYA TECHNOLOGY CORP.
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
Serial Presence Detect -- Part 2 of 2 (512MB)
64Mx64 1RANK UNBUFFERED DDR2 SDRAM DIMM based on 64Mx8, 4Banks, 8K Refresh, 1.8V DDR2 SDRAMs with SPD
SPD Entry Value
Serial PD Data Entry
(Hexadecimal)
Byte
Description
-37B
-3C
-25D
-25C
-37B
-3C
-25D
-25C
Note
40
Extension of Byte 41 tRC and Byte 42 tRFC
00: The number below a decimal point of
tRC and tRFC are 0, tRFC is less than
256ns. 30: The number below a decimal
point of tRC is 5, tRFC is less than
256ns
00
30
41
Minimum Core Cycle Time (tRC) (ns)
60.0
57.5
3C
39
42
Min. Auto Refresh Command Cycle Time (tRFC)
105ns
69
43
Maximum Clock Cycle Time (tCK)
8.0ns
80
44
Max. DQS-DQ Skew Factor (tDQS) (ns)
0.3
0.24
0.2
1E
18
14
45
Read Data Hold Skew Factor (tQHS) (ns)
0.40
0.34
0.30ns
28
22
1E
46
PLL Relock Time
N/A
00
47
Tcasemax
DT4R4W Delta
95C
0C
95C
1.2C
95C
0C
50
53
50
48
Thermal Resistance of DRAM Package from Top (Case) to
Ambient (Psi-T-A DRAM)
61C/W
7A
49
DRAM Case Temperature Rise from Ambient due to
Activate-Precharge/Mode Bits (DT0/Mode Bits)
8.11C
8.69C
9.74C
4B
53
63
50
DRAM Case Temperature Rise from Ambient due to
Precharge/Quiet Standby (DT2N/DT2Q)
4.64C
5.8C
5.91C
2F
3A
3C
51
DRAM Case Temperature Rise from Ambient due to
Precharge Power-Down (DT2P)
0.81C
37
52
DRAM Case Temperature Rise from Ambient due to Active
Standby (DT3N)
4.98C
5.8C
6.95C
22
27
2F
53
DRAM Case Temperature Rise from Ambient due to Active
Power-Down with Fast PDN Exit (DT3Pfast)
3.25C
3.82C
4.52C
41
4D
5B
54
DRAM Case Temperature Rise from Ambient due to Active
Power-Down with Slow PDN Exit (DT3Pslow)
1.04C
2A
55
DRAM Case Temperature Rise from Ambient due to Page
Open Burst Read/DT4R4W Mode Bit (DT4R/DT4R4W
Mode Bit)
12.75C 15.07C
17.96C
40
4C
5C
56
DRAM Case Temperature Rise from Ambient due to Burst
Refresh (ST5B)
17.39C 18.54C
20.28C
23
26
29
57
DRAM Case Temperature Rise from Ambient due to Bank
interleave Reads with Auto-Precharge (DT7)
18.54C
19.7C
26
28
58
Thermal Resistance of PLL Package from Top (Case) to
Ambient (Psi T-A PLL)
00
59
Thermal Resistance of Register Package from Top (Case)
to Ambient (Psi T-A Register)
00
60
PLL Case Temperature Rise from Ambient due to PLL
Active (DT PLL Active)
00
61
Register Case Temperature Rise from Ambient due to
Register Active/Mode Bit (DT Register Active/Mode Bit)
00
62
SPD Reversion
1.2
12
63
Checksum for byte 0-62
Checksum data
4A
3E
40
5C
64-71 Manufacture’s JEDEC ID Code
NANYA
7F7F7F0B00000000
72
Module Manufacturing Location
Manufacturing Code
--
73-91 Module Part number
Module Part Number in ASCII
--
1
92-255 Reserved
Undefined
--
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