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參數(shù)資料
| 型號： | NS32491 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Serial Network Interface |
| 中文描述： | 串行網(wǎng)絡(luò)接口 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 175K |
| 代理商： | NS32491 |
6.0 Absolute Maximum Ratings
Supply Voltage (V
CC
)
Input Voltage (TTL)
6V
0 to 5.5V
Input Voltage (differential)
b
5.5 to
a
16V
0 to 16V
b
40 mA
b
65
§
to 150
§
C
Output Voltage (differential)
Output Current (differential)
Storage Temperature
Lead Temperature (soldering, 10 sec)
Package Power Rating at 25
§
C
(PC Board Mounted)
Derate Linearly at the rate of 23.8 mW/
§
C
*
For actual power dissipation of the device please refer to Section 7.0.
300
§
C
2.95W
*
ESD rating is to be determined.
Recommended Operating
Conditions
Supply Voltage (V
CC
)
Ambient Temperature
5V
g
5%
0
§
to 70
§
C
Note: Absolute maximum ratings are those values beyond
which the safety of the device cannot be guaranteed. They
are not meant to imply that the device should be operated at
these limits.
7.0 Electrical Characteristics
V
CC
e
5V
g
5%, T
A
e
0
§
to 70
§
C (Notes 1 & 2)
Symbol
Parameter
Test Conditions
Min
Max
Units
V
IH
V
IL
I
IH
Input High Voltage (TTL and X1)
2.0
V
Input Low Voltage (TTL and X1)
0.8
V
Input High Current (TTL)
Input High Current (RX
g
CD
g
)
Input Low Current (TTL)
Input Low Current (RX
g
CD
g
)
Input Clamp Voltage (TTL)
V
IN
e
V
CC
V
IN
e
V
CC
V
IN
e
0.5V
V
IN
e
0.5V
I
IN
e b
12 mA
I
OH
e b
100
m
A
I
OL
e
8 mA
50
500
m
A
m
A
I
IL
b
300
b
700
b
1.2
m
A
m
A
V
CL
V
OH
V
OL
I
OS
V
OD
V
Ouptut High Voltage (TTL/MOS)
3.5
V
Output Low Voltage (TTL/MOS)
0.5
V
Output Short Circuit Current (TTL/MOS)
b
40
b
200
mA
Differential Output Voltage (TX
g
)
78
X
termination, and
270
X
from each to GND
g
500
g
1200
mV
V
OB
V
DS
V
CM
I
CC
Diff. Output Voltage Imbalance (TX
g
)
Diff. Squelch Threshold (RX
g
CD
g
)
Diff. Input Common Mode Voltage (RX
g
CD
g
)
Power Supply Current
same as above
g
40
b
300
5.25
mV
b
175
5.25
mV
V
10Mbit/s
270
mA
8.0 Switching Characteristics
V
CC
e
5V
g
5%, T
A
e
0
§
to 70
§
C (Note 2)
Symbol
Parameter
Figure
Min
Typ
Max
Units
OSCILLATOR SPECIFICATION
t
XTH
t
XTL
TRANSMIT SPECIFICATION
X1 to Transmit Clock High
12
8
20
ns
X1 to Transmit Clock Low
12
8
20
ns
t
TCd
t
TCr
t
TCf
t
TDs
t
TDh
t
TEs
t
TEh
t
TOd
t
TOr
t
TOf
t
TOj
t
TOh
t
TOi
Transmit Clock Duty Cycle at 50% (10 MHz)
12
42
50
58
%
Transmit Clock Rise Time (20% to 80%)
12
8
ns
Transmit Clock Fall Time (80% to 20%)
12
8
ns
Transmit Data Setup Time to Transmit Clock Rising Edge
4 & 12
20
ns
Transmit Data Hold Time from Transmit Clock Rising Edge
4 & 12
0
ns
Transmit Enable Setup Time to Trans. Clock Rising Edge
4 & 12
20
ns
Transmit Enable Hold Time from Trans. Clock Rising Edge
5 & 12
0
ns
Transmit Output Delay from Transmit Clock Rising Edge
4 & 12
40
ns
Transmit Output Rise Time (20% to 80%)
12
7
ns
Transmit Output Fall Time (80% to 20%)
12
7
ns
Transmit Output Jitter
12
g
0.25
ns
Transmit Output High Before Idle in Half Step Mode
5 & 12
200
ns
Transmit Output Idle Time in Half Step Mode
5 & 12
800
ns
Note 1:
All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified.
Note 2:
All typicals are given for V
CC
e
5V and T
A
e
25
§
C.
5
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