參數(shù)資料
型號(hào): NL37WZ07USG
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Triple Buffer with Open Drain Outputs
中文描述: 37WZ SERIES, TRIPLE 1-INPUT NON-INVERT GATE, PDSO8
封裝: LEAD FREE, US-8
文件頁(yè)數(shù): 1/5頁(yè)
文件大?。?/td> 78K
代理商: NL37WZ07USG
Semiconductor Components Industries, LLC, 2006
April, 2006 Rev. 5
1
Publication Order Number:
NL37WZ07/D
NL37WZ07
Triple Buffer with Open
Drain Outputs
The NL37WZ07 is a high performance triple buffer with open drain
outputs operating from a 1.65 V to 5.5 V supply.
The internal circuit is composed of multiple stages, including an
open drain output which provides the capability to set output
switching level. This allows the NL37WZ07 to be used to interface
5 V circuits to circuits of any voltage between V
CC
and 7 V using an
external resistor and power supply.
Features
Extremely High Speed: t
PD
2.5 ns (typical) at V
CC
= 5 V
Designed for 1.65 V to 5.5 V V
CC
Operation
Overvoltage Tolerant Inputs
LVTTL Compatible Interface Capability with 5 V TTL Logic with
V
CC
= 3 V
LVCMOS Compatible
24 mA Output Sink Capability @ 3.0 V
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
Chip Complexity: FET = 72
PbFree Package is Available
V
CC
IN A1
OUT Y3
GND
IN A2
OUT Y2
Figure 1. Pinout
Figure 2. Logic Symbol
IN A2
OUT Y2
OUT Y1
IN A1
1
2
3
8
7
6
OUT Y3
IN A3
IN A3
OUT Y1
4
5
1
1
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAM
8
PIN ASSIGNMENT
1
2
3
IN A2
IN A1
GND
4
5
OUT Y3
OUT Y1
6
FUNCTION TABLE
L
H
A Input
Y Output
L
Z
7
8
V
CC
IN A3
OUT Y2
US8
US SUFFIX
CASE 493
8
1
http://onsemi.com
1
L7 M
L7
M
= Device Code
= Date Code*
= PbFree Package
*Date Code orientation may vary depending upon
manufacturing location.
(Note: Microdot may be in either location)
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