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參數(shù)資料
| 型號： | NL37WZ14USG |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Triple Schmitt−Trigger Inverter |
| 中文描述： | 37WZ SERIES, TRIPLE 1-INPUT INVERT GATE, PDSO8 |
| 封裝： | LEAD FREE, US-8 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大小： | 82K |
| 代理商： | NL37WZ14USG |
Semiconductor Components Industries, LLC, 2006
April, 2006 Rev. 6
1
Publication Order Number:
NL37WZ14/D
NL37WZ14
Triple SchmittTrigger
Inverter
The NL37WZ14 is a high performance triple inverter with
SchmittTrigger inputs operating from a 1.65 to 5.5 V supply.
Pin configuration and function are the same as the NL37WZ04, but
the inputs have hysteresis, and with its Schmitt trigger function, the
NL37WZ14 can be used as a line receiver which will receive slow
input signals. The NL37WZ14 is capable of transforming slowly
changing input signals into sharply defined, jitterfree output signals.
In addition, it has a greater noise margin than conventional inverters.
The NL37WZ14 has hysteresis between the positivegoing and the
negativegoing input thresholds (typically 1.0 V) which is determined
internally by transistor ratios and is essentially insensitive to
temperature and supply voltage variations.
Features
Designed for 1.65 V to 5.5 V V
CC
Operation
Over Voltage Tolerant Inputs and Outputs
LVTTL Compatible Interface Capability with 5 V TTL Logic
with V
CC
= 3 V
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current Substantially Reduces System
Power Requirements
Current Drive Capability is 24 mA at the Outputs
Chip Complexity: FET = 94
PbFree Package is Available
IN A2
OUT Y2
Figure 1. Pinout
(Top View)
Figure 2. Logic Symbol
OUT Y1
IN A1
OUT Y3
IN A3
V
CC
IN A1
OUT Y3
GND
IN A2
OUT Y2
1
2
3
8
7
6
IN A3
OUT Y1
4
5
1
1
1
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAM
PIN ASSIGNMENT
1
2
3
IN A2
IN A1
GND
4
5
OUT Y3
OUT Y1
6
FUNCTION TABLE
L
H
A Input
Y Output
H
L
7
8
V
CC
IN A3
OUT Y2
US8
US SUFFIX
CASE 493
8
1
http://onsemi.com
1
8
LA
M
= Device Code
= Date Code*
= PbFree Package
LA M
*Date Code orientation may vary depending upon
manufacturing location.
(Note: Microdot may be in either location)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NL37WZ14 | Triple Schmitt-Trigger Inverter |
| NL37WZ14US | Triple Schmitt-Trigger Inverter |
| Nl37wz14 | Triple Schmitt-Trigger Inverter(三路史密特觸發(fā)器反向器) |
| NL37WZ16 | Triple Buffer |
| NL37WZ16_06 | Triple Buffer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NL37WZ14USG-CUT TAPE | 制造商:ON 功能描述:NL37WZ14 Series 1.65 to 5.5 V Triple Inverter Schmitt - US-8 |
| NL37WZ16 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Triple Buffer |
| NL37WZ16/D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Triple Buffer |
| NL37WZ16_06 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Triple Buffer |
| NL37WZ16_12 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Triple Buffer |
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