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參數(shù)資料
| 型號(hào)： | NJU26105 |
| 廠商： | New Japan Radio Co., Ltd. |
| 英文描述： | NJU26100 Series Hardware Specification |
| 中文描述： | NJU26100系列硬件規(guī)格 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 270K |
| 代理商： | NJU26105 |
NJU26100 Series
- 8 -
Ver.2005-02-24
The number of BCK clock must follow the serial data format. If the BCK clock is not enough, the right sound are
not produced. Set serial data format for the adequate mode that A/Ds, D/As or Codecs reqire.
The NJU26100 Series supports serial data format which includes 32(32Fs) or 64(64Fs) BCK clocks. This serial
data format is applied to both MASTER and SLAVE mode.
4.2 Serial Audio Data Transmitting Diagram
Fig. 4-2 Left-Justified Data Format 64Fs, 24bit Data
Fig. 4-3 Right-Justified Data Format 64Fs, 24bit Data
Fig. 4-4 I
2
S Data Format 64Fs, 24bit Data
Fig. 4-5 Left-Justified Data Format 64Fs, 20bit Data
* The 24bit data is always outputted to a SDO0 pin in the format of figure 4-5 to figure 4-10.
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Left Channe
Right Channel
MSB
MSB
LSB
LSB
32 Clocks
32 Clocks
LRI, LRO
BCKI, BCKO
SDI, SDO
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Left Channe
Right Channel
MSB
MSB
LSB
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32 Clocks
32 Clocks
LRI, LRO
BCKI, BCKO
SDI, SDO
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Left Channe
Right Channel
MSB
MSB
LSB
LSB
32 Clocks
32 Clocks
LRI, LRO
BCKI, BCKO
SDI, SDO
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Left Channe
Right Channel
MSB
MSB
LSB
LSB
32 Clocks
32 Clocks
LRI, LRO
BCKI, BCKO
SDI, SDO
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| NJU26105FR1 | 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC EALA 3.1 ch Output Digtl Signl Processr RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT |
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