VCC
參數(shù)資料
型號(hào): NCV7382DR2G
廠(chǎng)商: ON Semiconductor
文件頁(yè)數(shù): 2/16頁(yè)
文件大?。?/td> 0K
描述: IC TRANSCEIVER LIN ENH 8-SOIC
產(chǎn)品變化通告: Product Obsolescence 30/Sept/2009
標(biāo)準(zhǔn)包裝: 2,500
類(lèi)型: 收發(fā)器
驅(qū)動(dòng)器/接收器數(shù): 1/1
規(guī)程: LIN
電源電壓: 7 V ~ 18 V
安裝類(lèi)型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOICN
包裝: 帶卷 (TR)
NCV7382
http://onsemi.com
10
The TxD pin has an internal pullup resistor connected to
VCC. This secures that an open TxD pin generates a
recessive BUS level.
RxD Output
The signal on the BUS pin will be transferred
continuously to the RxD pin. Short spikes on the bus signal
are filtered with internal circuitry (Figure 3 and Figure 7).
Figure 7. Receive Impulse Diagram
60%
t < trec_deb
VS
RxD
40%
t < trec_deb
t
BUS
50%
VBUS_CNT_max
VBUS_CNT_min
VhHYS
The receive threshold values VBUS_CNT_max and
VBUS_CNT_min are symmetrical to 0.5 * VS with a
hysteresis of 0.16 * VS (typical). The LIN specific receive
threshold is between 0.4 * VS and 0.6*VS.
The received BUS signal will be output to the RxD pin:
BUS < VBUS_CNT – 0.5 * VHYS
→ RxD = low (BUS dominant)
BUS > VBUS_CNT + 0.5 * VHYS
→ RxD = high, floating (BUS recessive)
RxD is a buffered open drain output with a typical load
of:
Resistance: 2.7 k
W
Capacitance: < 20 pF
EN-Pin
The NCV7382 is switched into sleep mode with a falling
edge and into normal mode with a rising edge of the EN pin.
It will remain in normal mode as long as EN = high (See
Figure 4 - Sleep Mode and Wakeup Procedure for more
details).
When the NCV7382 is switched to sleep mode, the
voltage regulator on the INH pin is switched off.
The NCV7382 can be turned off with EN = low
independent of the state of the bus-transceiver.
The EN input has an internal pulled down to guarantee
a low level with EN floating.
Data Rate
The NCV7382 is a constant slew rate transceiver. The
bus driver operates with a fixed slew rate range of 1.0 V/
ms
v DV/DT v 3.0 V/ms. This principle provides very good
symmetry of the slope times between recessive to dominant
and dominant to recessive slopes within the LIN bus load
range (CBUS, Rterm).
The NCV7382 guarantees data rates up to 20 kbit within
the complete bus load range under worst case conditions.
The constant slew rate principle holds appropriate voltage
levels
and
can
operate
within
the
LIN
Protocol
Specification for RC oscillator systems with a matching
tolerance up to 2%.
Operating Under Disturbance
Loss of Battery
If VS and VCC are disconnected from the battery, the bus
pin is in high impedance state. There is no impact to the bus
traffic.
Loss of Ground
In case of an interrupted ground connection from VS and
VCC, there is no influence to the bus line.
Short Circuit to Battery
The transmitter output current is limited to 200 mA
(max) in case of short circuit to battery.
Short Circuit to Ground
Negative voltages on the BUS pin are limited primarily
to current through the internal 30 k resistor and series diode
from VS through a switched device controlled by EN.
Secondary contributions are attributed to the resistor and
diode hardwired from VS to BUS.
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