參數(shù)資料
型號(hào)： NCT72CMNR2G
廠商： ON Semiconductor
文件頁(yè)數(shù)： 14/20頁(yè)
文件大小： 326K
描述： IC REMOTE THERMAL SENSOR 8-DFN
標(biāo)準(zhǔn)包裝： 1
功能： 溫度監(jiān)控系統(tǒng)（傳感器）
傳感器類(lèi)型： 內(nèi)部和外部
感應(yīng)溫度： 0°C ~ 127°C，-64°C ~ 191°C
精確度： ±2.5°C
拓?fù)洌?/td> ADC，比較器，多路復(fù)用器，寄存器庫(kù)
輸出類(lèi)型： 2 線(xiàn)串行，I²C?/SMBUS?
輸出警報(bào)： 是
輸出風(fēng)扇： 是
電源電壓： 2.8 V ~ 3.6 V
工作溫度： -40°C ~ 125°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-VFDFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 8-DFN（3x3）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱(chēng)： NCT72CMNR2GOSDKR
NCT72
http://onsemi.com
14
When reading data from a register there are two
possibilities.
?SPAN class="pst NCT72CMNR2G_2296365_3"> If the address pointer register value of the NCT72 is
unknown or not the desired value, it is first necessary to
set it to the correct value before data can be read from
the desired data register. This is done by writing to the
NCT72 as before, but only the data byte containing the
register read address is sent, because data is not to be
written to the register see Figure 16.
A read operation is then performed consisting of the
serial bus address, R/W
 bit set to 1, followed by the
data byte read from the data register see Figure 17.
?SPAN class="pst NCT72CMNR2G_2296365_3"> If the address pointer register is known to be at the
desired address, data can be read from the corresponding
data register without first writing to the address pointer
register and the bus transaction shown in Figure 16 can
be omitted.
NOTES:It is possible to read a data byte from a data register without
first writing to the address pointer register. However, if the
address pointer register is already at the correct value, it is
not possible to write data to a register without writing to the
address pointer register because the first data byte of a write
is always written to the address pointer register.
Some of the registers have different addresses for read and
write operations. The write address of a register must be
written to the address pointer if data is to be written to that
register, but it may not be possible to read data from that
address. The read address of a register must be written to
the address pointer before data can be read from that
register.
ALERT
 Output
This is applicable when Pin 6 is configured as an ALERT
output. The ALERT
  output goes low whenever an
out-of-limit measurement is detected, or if the remote
temperature sensor is open circuit. It is an open-drain output
and requires a pullup resistor to V
DD
. Several ALERT
 outputs
can be wire-ORed together, so that the common line goes
low if one or more of the ALERT
 outputs goes low.
The ALERT
 output can be used as an interrupt signal to a
processor, or as an SMBALERT
. Slave devices on the SMBus
cannot normally signal to the bus master that they want to
talk, but the SMBALERT
 function allows them to do so.
One or more ALERT
  outputs can be connected to a
common SMBALERT
 line that is connected to the master.
When the SMBALERT
 line is pulled low by one of the
devices, the following procedure occurs (see Figure 18):
Figure 18. Use of SMBALERT
ALERT RESPONSE
ADDRESS
MASTER SENDS
ARA AND READ
COMMAND
DEVICE SENDS
ITS ADDRESS
RD
START
ACK
DEVICE
ADDRESS
NO
ACK
STOP
MASTER RECEIVES SMBALERT
1. SMBALERT
 is pulled low.
2. Master initiates a read operation and sends the
alert response address (ARA = 0001 100). This is
a general call address that must not be used as a
specific device address.
3. The device whose ALERT
 output is low responds
to the alert response address and the master reads
its device address. As the device address is seven
bits, an LSB of 1 is added. The address of the
device is now known and it can be interrogated in
the usual way.
4. If more than one devices ALERT
 output is low,
the one with the lowest device address takes
priority, in accordance with normal SMBus
arbitration.
Once the NCT72 has responded to the alert response
address, it resets its ALERT
 output, provided that the error
condition that caused the ALERT
 no longer exists. If the
SMBALERT
 line remains low, the master sends the ARA
again, and so on until all devices whose ALERT
 outputs
were low have responded.
Low Power Standby Mode
The NCT72 can be put into low power standby mode by
setting Bit 6 of the configuration register. When Bit 6 is low,
the NCT72 operates normally. When Bit 6 is high, the ADC
is inhibited, and any conversion in progress is terminated
without writing the result to the corresponding value
register. However, the SMBus is still enabled. Power
consumption in the standby mode is reduced to 5 mA if there
is no SMBus activity, or 30 mA if there are clock and data
signals on the bus.
When the device is in standby mode, it is possible to
initiate a one-shot conversion of both channels by writing to
the one-shot register (Address 0x0F), after which the device
returns to standby. It does not matter what is written to the
one-shot register, all data written to it is ignored. It is also
possible to write new values to the limit register while in
standby mode. If the values stored in the temperature value
registers are outside the new limits, an ALERT
 is generated,
even though the NCT72 is still in standby.
1.8 V Logic Operation
The NCT72 is 1.8 V logic compatible; this means that the
communication lines (SDA and SCL) ALERT
/THERM2
and THERM
 can be pulled up to a 1.8 V supply while still
remaining within the device Idd spec.
Sensor Fault Detection
At its D+ input, the NCT72 contains internal sensor fault
detection circuitry. This circuit can detect situations where
an external remote diode is either not connected or
incorrectly connected to the NCT72. A simple voltage
comparator trips if the voltage at D+ exceeds V
DD
1.0 V
(typical), signifying an open circuit between D+ and D.
The output of this comparator is checked when a conversion
is initiated. Bit 2 of the status register (open flag) is set if a
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