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參數(shù)資料
| 型號： | NCT72CMNR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 11/20頁 |
| 文件大小： | 326K |
| 描述： | IC REMOTE THERMAL SENSOR 8-DFN |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 功能： | 溫度監(jiān)控系統(tǒng)（傳感器） |
| 傳感器類型： | 內(nèi)部和外部 |
| 感應(yīng)溫度： | 0°C ~ 127°C，-64°C ~ 191°C |
| 精確度： | ±2.5°C |
| 拓?fù)洌?/td> | ADC，比較器，多路復(fù)用器，寄存器庫 |
| 輸出類型： | 2 線串行，I²C?/SMBUS? |
| 輸出警報： | 是 |
| 輸出風(fēng)扇： | 是 |
| 電源電壓： | 2.8 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-VFDFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 8-DFN（3x3） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | NCT72CMNR2GOSDKR |
NCT72
http://onsemi.com
11
set, the THERM2
output goes low to indicate that the
temperature measurements are outside the programmed
limits. Flag 5 and Flag 3 have no effect on THERM2
. The
behavior of THERM2
is otherwise the same as THERM
.
Table 10. STATUS REGISTER BIT ASSIGNMENTS
Bit
Name
Function
7
BUSY
1 when ADC Is Converting
6
LHIGH
(Note 1)
1 when Local High Temperature Limit is
Tripped
5
LLOW
(Note 1)
1 when Local Low Temperature Limit is
Tripped
4
RHIGH
(Note 1)
1 when Remote High Temperature Limit
is Tripped
3
RLOW
(Note 1)
1 when Remote Low Temperature Limit
is Tripped
2
OPEN
(Note 1)
1 when Remote Sensor is an Open
Circuit
1
RTHRM
1 when Remote THERM
Limit is Tripped
0
LTHRM
1 when Local THERM
Limit is Tripped
1. These flags stay high until the status register is read or they are
reset by POR unless Pin 6 is configured as THERM2
. Then, only
Bit 2 remains high until the status register is read or is reset by
POR.
Offset Register
Offset errors can be introduced into the remote
temperature measurement by clock noise or when the
thermal diode is located away from the hot spot. To achieve
the specified accuracy on this channel, these offsets must be
removed.
The offset value is stored as a 10-bit, twos complement
value in Register 0x11 (high byte) and Register 0x12 (low
byte, left justified). Only the upper two bits of Register 0x12
are used. The MSB of Register 0x11 is the sign bit. The
minimum, programmable offset is 128癈, and the
maximum is +127.75癈. The value in the offset register is
added to, or subtracted from, the measured value of the
remote temperature.
The offset register powers up with a default value of 0癈
and has no effect unless the user writes a different value to
it.
Table 11. SAMPLE OFFSET REGISTER CODES
Offset Value
0x11
0x12
128癈
1000 0000
00 00 0000
4癈
1111 1100
00 00 0000
1癈
1111 1111
00 000000
0.25癈
1111 1111
10 00 0000
0癈
0000 0000
00 00 0000
+0.25癈
0000 0000
01 00 0000
+1癈
0000 0001
00 00 0000
+4癈
0000 0100
00 00 0000
+127.75癈
0111 1111
11 00 0000
One-shot Register
The one-shot register is used to initiate a conversion and
comparison cycle when the NCT72 is in standby mode, after
which the device returns to standby. Writing to the one-shot
register address (0x0F) causes the NCT72 to perform a
conversion and comparison on both the internal and the
external temperature channels. This is not a data register as
such, and it is the write operation to Address 0x0F that
causes the one-shot conversion. The data written to this
address is irrelevant and is not stored.
Consecutive ALERT
Register
The value written to this register determines how many
out-of-limit measurements must occur before an ALERT
is
generated. The default value is that one out-of-limit
measurement generates an ALERT
. The maximum value
that can be chosen is 4. The purpose of this register is to
allow the user to perform some filtering of the output. This
is particularly useful at the fastest three conversion rates,
where no averaging takes place. This register is at
Address 0x22.
Table 12. CONSECUTIVE ALERT
REGISTER CODES
Register Value
Number of Out-of-limit
Measurements Required
yxxx 000x
1
yxxx 001x
2
yxxx 011x
3
yxxx 111x
4
NOTE: x = dont care bits, and y = SMBus timeout bit.
Default = 0. See SMBus section for more information.
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