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參數(shù)資料
| 型號： | NCP5322ADWR2G |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | Two−Phase Buck Controller with Integrated Gate Drivers and 5−Bit DAC |
| 中文描述： | 1.5 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | LEAD FREE, SOIC-28 |
| 文件頁數(shù)： | 16/31頁 |
| 文件大?。?/td> | 726K |
| 代理商： | NCP5322ADWR2G |
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NCP5322A
http://onsemi.com
16
when the load current is removed. For low current
applications a droop resistor can provide fast accurate adaptive
positioning. However, at high currents the loss in a droop
resistor becomes excessive. For example; in a 50 A converter
a 1 m resistor to provide a 50 mV change in output voltage
between no load and full load would dissipate 2.5 Watts.
Lossless adaptive positioning is an alternative to using a
droop resistor, but must respond to changes in load current.
Figure 14 shows how adaptive positioning works. The
waveform labeled normal shows a converter without
adaptive positioning. On the left, the output voltage sags
when the output current is stepped up and later overshoots
when current is stepped back down. With fast (ideal)
adaptive positioning the peak to peak excursions are cut in
half. In the slow adaptive positioning waveform the output
voltage is not repositioned quickly enough after current is
stepped up and the upper limit is exceeded.
Adaptive Positioning
Limits
Adaptive Positioning
Normal
Fast
Slow
Figure 14. Adaptive Positioning
The controller can be configured to adjust the output
voltage based on the output current of the converter. (Refer
to the application diagram in Figure 1). To set the noload
positioning, a resistor is placed between the output voltage
and V
FB
pin. The V
FB
bias current will develop a voltage
across the resistor to adjust the noload output voltage. The
V
FB
bias current is dependent on the value of R
OSC
as shown
in the datasheet.
During no load conditions the V
DRP
pin is at the same
voltage as the V
FB
pin, so none of the V
FB
bias current flows
through the V
DRP
resistor. When output current increases
the V
DRP
pin increases proportionally and the V
DRP
pin
current offsets the V
FB
bias current and causes the output
voltage to decrease.
The response during the first few microseconds of a load
transient are controlled primarily by power stage output
impedance and the ESR and ESL of the output filter. The
transition between fast and slow positioning is controlled by
the total ramp size and the error amp compensation. If the
current signal size is too large or the error amp too slow there
will be a long transition to the final voltage after a transient.
This will be most apparent with lower capacitance output
filters.
Error Amp Compensation & Tuning
The transconductance error amplifier requires a capacitor
(C
CMP1
in the Applications Diagram) between the COMP
pin and GND. This capacitor stabilizes the transconductance
error amplifier. Values less than 1 nF may cause oscillations
of the COMP voltage. These oscillations will increase the
output voltage jitter.
The capacitor (C
AMP
) between the COMP pin and the
inverting error amplifier input (the V
FB
pin) and the parallel
combination of the resistors R
FBK1
and R
DRP1
determine the
bandwidth of the error amplifier. The gain of the error
amplifier crosses 0 dB at a high enough frequency to give a
quick transient response, but well below the switching
frequency to minimize ripple and noise on the COMP pin.
A capacitor in parallel with the V
FB
resistor (C
FBK2
) adds
a zero to boost phase near the crossover frequency to
improve loop stability.
Settingup and tuning the error amplifier is a three step
process. First, the noload and fullload adaptive voltage
positioning (AVP) are set using R
FBK1
and R
DRP1
,
respectively. Second, the current sense time constant and
error amplifier gain are adjusted with R
CSn
and C
AMP
while
monitoring V
OUT
during transient loading. Lastly, the
peaktopeak voltage ripple on the COMP pin is examined
when the converter is fully loaded to insure low output
voltage jitter. The details of this process are covered in the
Design Procedure section.
Undervoltage Lockout (UVLO)
The controller has undervoltage lockout functions
connected to two pins. One, intended for the logic and
lowside drivers, with approximately a 4.2 V turnon
threshold is connected to the V
CCL
pin. A second, for the
high side drivers, with approximately a 1.875 V threshold,
is connected to the V
CCH1
pin.
The UVLO threshold for the high side drivers varies with
the part type. In many applications this function will be
disabled or will only check that the applicable supply is on
not that is at a high enough voltage to run the converter. See
individual datasheets for more information on UVLO.
Soft Start Enable, and Hiccup Mode
A capacitor between the Soft Start pin and GND controls
Soft Start and Hiccup mode slopes. A 0.1 F capacitor with
the 30 A charge current will allow the output to ramp up at
0.3 V/ms or 1.6 V in 5.3 ms at startup.
When a fault is detected due to an overcurrent condition
the converter will enter a low duty cycle hiccup mode.
During hiccup mode the converter will not switch from the
time a fault is detected until the Soft Start capacitor has
discharged below the Soft Start Discharge Threshold and
then charged back up above the Channel Start Up Offset.
The Soft Start pin will disable the converter when pulled
below the maximum Soft Start Discharge Threshold
(nominally 0.27 V).
Power Good (PWRGD)
The opencollector Power Good (PWRGD) pin is driven
by a “windowcomparator” monitoring V
CORE
. This
comparator will transition HIGH if V
CORE
is within
±
12%
of the nominal VID setting. After a 120 s delay, the
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| NCP5331 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:Two-Phase PWM Controller with Integrated Gate Drivers |
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| NCP5331FTR2 | 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
| NCP5331FTR2G | 功能描述:DC/DC 開關(guān)控制器 2 Phase Buck w/Gate Drivers for Athlon RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
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