參數(shù)資料
型號: NBSG16MNR2
廠商: ON Semiconductor
文件頁數(shù): 1/12頁
文件大?。?/td> 0K
描述: IC RCVR/DRVR RSECL SIGE DF 16QFN
產(chǎn)品變化通告: LTB Notification 06/Feb/2008
標準包裝: 3,000
類型: 收發(fā)器
應用: 儀表
安裝類型: 表面貼裝
封裝/外殼: 16-VFQFN 裸露焊盤
供應商設備封裝: 16-QFN(3x3)
包裝: 帶卷 (TR)
其它名稱: NBSG16MNR2OSTR
Semiconductor Components Industries, LLC, 2008
September, 2008 Rev. 18
1
Publication Order Number:
NBSG16/D
NBSG16
2.5V/3.3VSiGe Differential
Receiver/Driver with
RSECL* Outputs
*Reduced Swing ECL
Description
The NBSG16 is a differential receiver/driver targeted for high
frequency applications. The device is functionally equivalent to the
EP16 and LVEP16 devices with much higher bandwidth and lower
EMI capabilities.
Inputs incorporate internal 50
W termination resistors and accept
NECL (Negative ECL), PECL (Positive ECL), HSTL, LVTTL,
LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing
ECL), 400 mV.
The VBB and VMM pins are internally generated voltage supplies
available to this device only. The VBB is used as a reference voltage
for singleended NECL or PECL inputs and the VMM pin is used as a
reference voltage for LVCMOS inputs. For all singleended input
conditions, the unused complementary differential input is connected
to VBB or VMM as a switching reference voltage. VBB or VMM may
also rebias AC coupled inputs. When used, decouple VBB and VMM
via a 0.01
mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, VBB and VMM outputs should be left open.
Features
Maximum Input Clock Frequency > 12 GHz Typical
Maximum Input Data Rate > 12 Gb/s Typical
120 ps Typical Propagation Delay
40 ps Typical Rise and Fall Times
RSPECL Output with Operating Range: VCC = 2.375 V to 3.465 V
with VEE = 0 V
RSNECL Output with RSNECL or NECL Inputs with
Operating Range: VCC = 0 V with VEE = 2.375 V to 3.465 V
RSECL Output Level (400 mV PeaktoPeak Output), Differential
Output Only
50 W Internal Input Termination Resistors
Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices
VBB and VMM Reference Voltage Output
PbFree Packages are Available
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= PbFree Package
FCBGA16
BA SUFFIX
CASE 489
MARKING DIAGRAMS*
QFN16
MN SUFFIX
CASE 485G
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
SG
16
ALYWG
G
16
SG
16
ALYWG
G
1
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