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參數(shù)資料
| 型號： | NB7L32MMNR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK DIVIDER 1:2 16-QFN |
| 標(biāo)準(zhǔn)包裝： | 3,000 |
| 類型： | 時鐘除法器 |
| PLL： | 無 |
| 輸入： | CML，ECL，LVDS，LVPECL |
| 輸出： | CML |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 14GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.375 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 16-QFN（3x3） |
| 包裝： | 帶卷 (TR) |
NB7L32M
http://onsemi.com
2
NC
VEE
VCC
RVCC VCC
VCC
Q
VCC
VTCLK
CLK
VTCLK
56
7
8
16
15
14
13
12
11
10
9
1
2
3
4
NB7L32M
Exposed Pad (EP)
VEE
Figure 1. Pin Configuration (Top View)
Table 1. PIN DESCRIPTION
Pin
Name
I/O
Description
1
VTCLK
Internal 50 W termination pin. In the differential configuration when the input
termination pin (VTCLK, VTCLK) are connected to a common termination
voltage or left open, and if no signal is applied on CLK/CLK input then the
device will be susceptible to selfoscillation.
2
CLK
ECL, CML, LVDS Input
Noninverted differential input. In the differential configuration when the input
termination pin (VTCLK, VTCLK) are connected to a common termination
voltage or left open and if no signal is applied on CLK/CLK input, then the
device will be susceptible to selfoscillation.
3
CLK
ECL, CML, LVDS Input
Inverted differential input. In the differential configuration when the input termin-
ation pin (VTCLK, VTCLK) are connected to a common termination voltage or
left open and if no signal is applied on CLK/CLK input, then the device will be
susceptible to selfoscillation.
4
VTCLK
Internal 50 W termination pin. In the differential configuration when the input
termination pin (VTCLK, VTCLK) are connected to a common termination
voltage or left open and if no signal is applied on CLK/CLK input, then the
device will be susceptible to selfoscillation.
5
NC
No connect. NC pin must be left open.
6, 7, 8
VEE
Negative supply voltage.
9, 12, 13,
14, 16
VCC
Positive supply voltage.
10
Q
CML Output
Inverted differential output. Typically terminated with 50 W resistor to VCC.
11
Q
CML Output
Noninverted differential output. Typically terminated with 50 W resistor to VCC.
15
R
LVTTL/LVCMOS
Reset Input. Internal pulldown to 75 kW to VEE.
EP
Exposed Pad. The thermally exposed pad (EP) on package bottom (see case
drawing) must be attached to a heatsinking conduit. EP is electrically isolated
from VCC and VEE.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NB7L572 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V / 3.3V Differential 4:1 Mux Input to 1:2 LVPECL Clock/Data Fanout / Translator |
| NB7L572MNG | 功能描述:時鐘驅(qū)動器及分配 TSMC 4-1-2 MLL-PECL RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| NB7L572MNR4G | 功能描述:時鐘驅(qū)動器及分配 TSMC 4-1-2 MLL-PECL RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| NB7L585 | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:2.5V / 3.3V Differential 2:1 Mux Input to 1:6 LVPECL Clock/Data Fanout Buffer / Translator |
| NB7L585MNG | 功能描述:時鐘驅(qū)動器及分配 2.5/3.3V DIFF MUX RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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