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參數(shù)資料
| 型號： | NAND512W4A0AV1F |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 32M X 16 FLASH 3V PROM, 35 ns, PDSO48 |
| 封裝： | 12 X 17 MM, 0.65 MM HEIGHT, ROHS COMPLIANT, PLASTIC, USOP-48 |
| 文件頁數(shù)： | 7/57頁 |
| 文件大?。?/td> | 916K |
| 代理商： | NAND512W4A0AV1F |
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NAND128-A, NAND256-A, NAND512-A, NAND01G-A
MEMORY ARRAY ORGANIZATION
The memory array is made up of NAND structures
where 16 cells are connected in series.
The memory array is organized in blocks where
each block contains 32 pages. The array is split
into two areas, the main area and the spare area.
The main area of the array is used to store data
whereas the spare area is typically used to store
Error correction Codes, software flags or Bad
Block identification.
In x8 devices the pages are split into a main area
with two half pages of 256 Bytes each and a spare
area of 16 Bytes. In the x16 devices the pages are
split into a 256 Word main area and an 8 Word
spare area. Refer to Figure 10., Memory Array Or-
Bad Blocks
The NAND Flash 528 Byte/ 264 Word Page devic-
es may contain Bad Blocks, that is blocks that con-
tain one or more invalid bits whose reliability is not
guaranteed. Additional Bad Blocks may develop
during the lifetime of the device.
The Bad Block Information is written prior to ship-
ping (refer to Bad Block Management section for
more details).
Table 4. shows the minimum number of valid
blocks in each device. The values shown include
both the Bad Blocks that are present when the de-
vice is shipped and the Bad Blocks that could de-
velop later on.
These blocks need to be managed using Bad
Blocks Management, Block Replacement or Error
Correction Codes (refer to SOFTWARE ALGO-
RITHMS section).
Table 4. Valid Blocks
Figure 10. Memory Array Organization
Density of Device
Min
Max
1Gbit
8032
8192
512Mbits
4016
4096
256Mbits
2008
2048
128Mbits
1004
1024
AI07587
Block = 32 Pages
Page = 528 Bytes (512+16)
512 Bytes
Spare
Area
2nd half Page
(256 bytes)
16
Bytes
Block
8 bits
16
Bytes
8 bits
Page
Page Buffer, 512 Bytes
1st half Page
(256 bytes)
Block = 32 Pages
Page = 264 Words (256+8)
256 Words
Spare
Area
Main Area
8
Words
16 bits
8
Words
16 bits
Page Buffer, 264 Words
Block
Page
x8 DEVICES
x16 DEVICES
相關PDF資料 |
PDF描述 |
|---|---|
| NAND512W4A0AV1 | 32M X 16 FLASH 3V PROM, 35 ns, PDSO48 |
| NAND512W4A0BZA1F | 32M X 16 FLASH 3V PROM, 35 ns, PBGA63 |
| NAND512W4A0BZB1E | 32M X 16 FLASH 3V PROM, 35 ns, PBGA55 |
| NAND512R3A0CV1F | 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48 |
| NAND512R3A0AN6E | 64M X 8 FLASH 1.8V PROM, 35 ns, PDSO48 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| NAND512W4A0AZA6E | 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 3V/3.3V 512MBIT 32MX16 12US 63VFBGA - Trays |
| NAND64GAH0HZA5F | 制造商:Micron Technology Inc 功能描述:NAND EMMC - Tape and Reel |
| NAND64GW3FGAZN6F | 制造商:Micron Technology Inc 功能描述:FULL CUSTOM MCP - Tape and Reel |
| NAND98R3M0CZBB5E | 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays |
| NAND98R3M0CZBB5F | 制造商:Micron Technology Inc 功能描述:WIRELESS - Tape and Reel |
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