- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄189003 > NAND512W3B3BN1E (NUMONYX) 64M X 8 FLASH 3V PROM, 35 ns, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | NAND512W3B3BN1E |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 64M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
| 封裝： | 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48 |
| 文件頁數(shù)： | 27/59頁 |
| 文件大?。?/td> | 998K |
| 代理商： | NAND512W3B3BN1E |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁當(dāng)前第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁
33/59
NAND512-B, NAND01G-B, NAND02G-B, NAND04G-B, NAND08G-B
DATA PROTECTION
The device has both hardware and software fea-
tures to protect against program and erase opera-
tions.
It features a Write Protect, WP, pin, which can be
used to protect the device against program and
erase operations. It is recommended to keep WP
at VIL during power-up and power-down.
In addition, to protect the memory from any invol-
untary program/erase operations during power-
transitions, the device has an internal voltage de-
tector which disables all functions whenever VCC
is below 1.5V.
The device features a Block Lock mode, which is
enabled by setting the Power-Up Read Enable,
Lock/Unlock Enable, PRL, signal to High.
The Block Lock mode has two levels of software
protection.
■
Blocks Lock/Unlock
■
Blocks Lock-down
Refer to Figure 21. for an overview of the protec-
tion mechanism.
Blocks Lock
All the blocks are locked simultaneously by issuing
a Blocks Lock command (see Table 10.).
All blocks are locked after power-up and when the
Write Protect signal is Low.
Once all the blocks are locked, one sequence of
consecutive blocks can be unlocked by using the
Blocks Unlock command.
Refer to Figure 25., Command Latch AC Wave-
forms for details on how to issue the command.
Blocks Unlock
A sequence of consecutive locked blocks can be
unlocked, to allow program or erase operations, by
issuing an Blocks Unlock command (see Table
The Blocks Unlock command consists of four
steps:
■
One bus cycle to setup the command
■
two or three bus cycles to give the Start Block
■
one bus cycle to confirm the command
■
two or three bus cycles to give the End Block
The Start Block Address must be nearer the logi-
cal LSB (Least Significant Bit) than End Block Ad-
dress.
If the Start Block Address is the same as the End
Block Address, only one block is unlocked.
Only one consecutive area of blocks can be un-
locked at any one time. It is not possible to unlock
multiple areas.
Figure 19. Blocks Unlock Operation
Note: Three address cycles are required for 2,4 and 8 Gb devices. The 512Mb and 1Gb devices only require two address cycles.
I/O
WP
Start Block Address, 3 cycles
ai08670
23h
Blocks Unlock
Command
Add1
Add2
Add3
24h
Add1
Add2
Add3
End Block Address, 3 cycles
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| NAND512W3B3CN6E | 64M X 8 FLASH 3V PROM, 35 ns, PDSO48 |
| NAND512W3B3CZA6E | 64M X 8 FLASH 3V PROM, 35 ns, PBGA63 |
| NAND08GR3B2CZC6T | 1G X 8 FLASH 1.8V PROM, 35 ns, PBGA63 |
| NAND08GR3B3BZC6E | 1G X 8 FLASH 1.8V PROM, 35 ns, PBGA63 |
| NAND08GR3B3CN1E | 1G X 8 FLASH 1.8V PROM, 35 ns, PDSO48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| NAND512W4A0AN6E | 功能描述:閃存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| NAND512W4A0AZA6E | 制造商:Micron Technology Inc 功能描述:FLASH PARALLEL 3V/3.3V 512MBIT 32MX16 12US 63VFBGA - Trays |
| NAND64GAH0HZA5F | 制造商:Micron Technology Inc 功能描述:NAND EMMC - Tape and Reel |
| NAND64GW3FGAZN6F | 制造商:Micron Technology Inc 功能描述:FULL CUSTOM MCP - Tape and Reel |
| NAND98R3M0CZBB5E | 制造商:Micron Technology Inc 功能描述:WIRELESS - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。