參數(shù)資料
型號： NAND128W3A0AN6F
廠商： STMICROELECTRONICS
元件分類： PROM
英文描述： 16M X 8 FLASH 3V PROM, 35 ns, PDSO48
封裝： 12 X 20 MM, ROHS COMPLIANT, PLASTIC, TSOP-48
文件頁數(shù)： 52/57頁
文件大?。?/td> 916K
代理商： NAND128W3A0AN6F
NAND128-A, NAND256-A, NAND512-A, NAND01G-A
56/57
REVISION HISTORY
Table 29. Document Revision History
Date
Version
Revision Details
06-Jun-2003
1.0
First Issue
07-Aug-2003
2.0
Design Phase
27-Oct-2003
3.0
Engineering Phase
03-Dec-2003
4.0
Document promoted from Target Specification to Preliminary Data status.
VCC changed to VDD and ICC to IDD.
Title of Table 2.. changed to “Product Description” and Page Program Typical Timing
for NANDXXXR3A devices corrected. Table 1., Product List, inserted on page 2.
13-Apr-2004
5.0
WSOP48 and VFBGA55 packages added, VFBGA63 (9 x 11 x 1mm) removed.
Figure 19., Cache Program Operation, modified and note 2 modified. Note removed
Meaning of tBLBH4 modified, partly replaced by tWHBH1 and tWHRL min for 3V devices
References removed from RELATED DOCUMENTATION section and reference
made to ST Website instead.
Note 3 to Table 7., Address Insertion, x16 Devices removed. Only 00h Pointer
operations are valid before a Cache Program operation. IDD4 removed from Table
Waveform. Small text changes.
28-May-2004
6.0
TFBGA55 package added (mechanical data to be announced). 512Mb Dual Die
devices added. Figure 19., Cache Program Operation modified.
Package code changed for TFBGA63 8.5 x 15 x 1.2mm, 6x8 ball array, 0.8mm pitch
(1Gbit Dual Die devices) in Table 28., Ordering Information Scheme.
02-Jul-2004
7.0
Cache Program removed from document. TFBGA55 package specifications added
Test conditions modified for VOL and VOH parameters in Table 19., DC Characteristics,
01-Oct-2004
8.0
Third part number corrected in Table 1., Product List. 512 Mbit Dual Die information
modified. Definition of a Bad Block modified in Bad Block Management paragraph.
Diagram modified.
Document promoted from Preliminary Data to Full Datasheet status.
03-Dec-2004
9.0
Automatic Page 0 Read at Power-Up option no longer available.
PC Demo board with simulation software removed from list of available development
tools. Chip Enable (E) paragraph clarified.
13-Dec-2004
10.0
Description of the family clarified in the SUMMARY DESCRIPTION section.
25-Feb-2005
11.0
WSOP48 replaced with USOP48 package,
VFBGA63 (8.5 x 15 x 1mm) replaced with VFBGA63 (9 x 11 x 1mm) package,
TFBGA63 (8.5 x 15 x 1mm) replaced with TFBGA63 (9 x 11 x 1.2mm) package.
相關PDF資料
PDF描述
NAND128W3A0AV6F 16M X 8 FLASH 3V PROM, 35 ns, PDSO48
NAND01GR4A2BZB1F 64M X 16 FLASH 1.8V PROM, 35 ns, PBGA63
NAND01GR4A2CZB1E 64M X 16 FLASH 1.8V PROM, 35 ns, PBGA63
NAND256W3A2BV1T 32M X 8 FLASH 3V PROM, 35 ns, PDSO48
NAND01GR4A2BN1T 64M X 16 FLASH 1.8V PROM, 35 ns, PDSO48
相關代理商/技術參數(shù)
參數(shù)描述
NAND128W3A0BN6E 功能描述:閃存 2.7-3.6V 128M(16Mx8) RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel
NAND128W3A0BN6F 功能描述:閃存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel
NAND128W3A2BDI6 制造商:Micron Technology Inc 功能描述:NAND 制造商:Micron Technology Inc 功能描述:NAND - Gel-pak, waffle pack, wafer, diced wafer on film
NAND128W3A2BN6E 功能描述:閃存 NAND 128 MEG RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel
NAND128W3A2BN6F 功能描述:閃存 NAND 128 MEG RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲類型:Flash 存儲容量:2 MB 結構:256 K x 8 定時類型: 接口類型:SPI 訪問時間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體: 封裝:Reel
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