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參數(shù)資料
| 型號(hào)： | MX881R |
| 廠商： | IXYS CORP |
| 元件分類： | 顯示驅(qū)動(dòng)器 |
| 中文描述： | LED DISPLAY DRIVER, PDSO16 |
| 封裝： | 3 X 5 MM, DFN-16 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 398K |
| 代理商： | MX881R |
MX881
8
7/30/07
Drawing No. 088109
www.claremicronix.com
MX881
IXYS
Serial Interface
The MX881 has a 4 wire serial interface that is capable of operating in two modes: I
2C or SPI. Both
modes transfer 8 bits of information but only 5 bits are actually used to set the internal control register.
Table 3 - Interface Modes
ISEL
Active Interface
1
Standard I
2C slave only serial interface
0
Standard 3-wire SPI
I
2C Bus Interface
The I
2C interface (follows the standard bus protocol and timing as defined by Philips). For complete
information on this bus, refer to
www.semiconductors.philips.com
The MX881 acts as a slave device on the I
2C bus and is compatible with both the HS (High Speed)
Mode and Fast Mode formats. Its primary function is as a receiver, receiving data from a master device
that is used to set a single 5 bit register that determines the average battery current and the output
voltage. It will act as a transmitter after receiving a read command. During a read, the register data will
be output onto the I
2C bus. When receiving a non-broadcast message, the MX881 will respond with an
acknowledge bit, in which it pulls the data bus low at the appropriate time. Data packets begin with the
Master issuing a START command (S) and end with the Master issuing a STOP command (P). A Restart
command is simply another START command that is issued before a STOP command. Note that with
START and STOP commands that SDATA transitions while SCLK is high. Conversely, for all other bits,
SDATA is only allowed to transition while SCLK is low.
Figure 2 - I
2C Sequences
SCLK
SDA TA
STA RT
STOP
DA TA is s table during high period
of SCLK
T
I2 C -D S
T
I2 C-DH
T
I2 C -C S
T
I2 C -S C
T
I2 C -C P
T
I2 C -P C
S
0
1
0
ST
AR
T
Slave Address
R/
W
n
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
AC
K
0
AC
K
0
Data Byte - Written to control
Register
The slave address is internally
fixed to 0111111 b.
0
Unshaded boxes represent bits
sourced by the master .
0
Shaded boxes represent bits
sourced by the MX889.
Write Sequence
Overview
P
ST
O
P
S
0
1
ST
A
R
T
Slave Address
R/
W
n
1
0
1
0
1
AC
K
0
AC
K
0
Data Byte - Register contents
placed on bus by MX889
Slave address is 0111111b.
Status
Read
Sequence
P
ST
O
P
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MX881RTR | 功能描述:LED照明驅(qū)動(dòng)器 Amps V RoHS:否 制造商:STMicroelectronics 輸入電壓:11.5 V to 23 V 工作頻率: 最大電源電流:1.7 mA 輸出電流: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SO-16N |
| MX882 | 制造商:Behringer 功能描述:ULTRALINK Pro 8 Channel Splitter / Mixer 制造商:BEHRINGER 功能描述:ULTRALINK PRO 8 INPUT LINE SPLITTER / MIXER |
| MX882AEST | 制造商:BLACK BOX 功能描述:FIBRE OPTIC MULTIPLEXER |
| MX-883 | 制造商:MURATA 制造商全稱:Murata Manufacturing Co., Ltd. 功能描述:Precision, High-Speed 8-Channel, Analog Multiplexers |
| MX884 | 制造商:IXYS 制造商全稱:IXYS Corporation 功能描述:High-Side Current Monitor With 10-Bit Serial Digital Output |
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