參數(shù)資料
型號: MVTX2802AG
廠商: ZARLINK SEMICONDUCTOR INC
元件分類: 網(wǎng)絡(luò)接口
英文描述: Managed 4-Port 1000 Mbps Ethernet Switch
中文描述: DATACOM, LAN SWITCHING CIRCUIT, PBGA596
封裝: 40 X 40 MM, 2.33 MM HEIGHT, MS-034, HSBGA-596
文件頁數(shù): 72/154頁
文件大?。?/td> 1936K
代理商: MVTX2802AG
MVTX2802
Data Sheet
72
Zarlink Semiconductor Inc.
11.7.3 RQSS – Receive Queue Status
CPU Address:h311
Accessed by CPU, serial interface (RO)
CPU queue status:
Bit[3:0]: Queue 3 to 0 not empty
Bit[4]: Head of line entry for Queue 3 to 0 is valid for too long. CPU queue 0 has no WRED threshold
Bit[7:5]: Head of line entry for Queue 3 to 0 is valid for too long or Queue length is longer than WRED threshold
11.7.4 TX_AGE – Tx Queue Aging timer
I
2
C Address: h03B;CPU Address:h312
Accessed by CPU, serial interface (RO)
Bit[4:0]: Unit of 100ms (Default 8)Disable transmission queue aging if value is zero.
Bit[5]Must be set to ‘0’
Bit[7:6]: Reserved
11.8 Group 4 Address
11.8.1 Search Engine Group
11.8.1.1 AGETIME_LOW – MAC address aging time Low
I
2
C Address h03C; CPU Address:h400
Accessed by CPU, serial interface and I
2
C (R/W)
Bit [7:0] Low byte of the MAC address aging timer. (Default 2c)
The 2800 removes the MAC address from the data base and sends a Delete MAC Address Control
Command to the CPU. Mac address aging is enable/disable by boot strap T_D[9].
11.8.1.2 AGETIME_HIGH –MAC address aging time High
Aging time is based on the following equation:
I
2
C Address h03D; CPU Address h401
Accessed by CPU, serial interface and I
2
C (R/W)
Bit [7:0]: High byte of the MAC address aging timer. (Default 00)
{AGETIME_HIGH, AGETIME_LOW} X (# of MAC entries X100μsec)
Note:
the number of entries= 66K when T_D[5] is pull down (SRAM memory size = 512K) and 34K when T_D[5]
is pull up (SRAM memory size = 256K).
7
4
3
0
LQ3
LQ2
LQ1
LQ0
NeQ3
NeQ2
NeQ1
NeQ0
7
6
5
4
0
Tx Queue Agent
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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