參數(shù)資料
型號: MVTX2801
廠商: Zarlink Semiconductor Inc.
英文描述: Unmanaged 4-Port 1000 Mbps Ethernet Switch
中文描述: 非托管4端口1000 Mbps以太網(wǎng)交換機(jī)
文件頁數(shù): 31/106頁
文件大?。?/td> 1455K
代理商: MVTX2801
MVTX2801
Data Sheet
31
Zarlink Semiconductor Inc.
Note
:
1. se = Search Engine
2. fe = Frame Engine
3. pgs = Port Group01, 23, 45, and 67
4. mc = MAC Control
5. tm = timer
10.2 Group 0 Address - MAC Ports Group
10.2.1 ECR1Pn: Port N Control Register
I
2
C Address h00+2n; Serial Interface Address: h000+2n (n=0 to 3) (For the 2600 it is different)
Accessed by serial interface and I
2
C (R/W)
BSTRRB0
BOOT STRAP read back register 0
F0B
RO
N/A
BSTRRB1
BOOT STRAP read back register 1
F0C
RO
N/A
BSTRRB2
BOOT STRAP read back register 2
F0D
RO
N/A
BSTRRB3
BOOT STRAP read back register 3
F0E
RO
N/A
BSTRRB4
BOOT STRAP read back register 4
F0F
RO
N/A
BSTRRB5
BOOT STRAP read back register 5
F10
RO
N/A
DA
DA Register
FFF
RO
N/A
da
7
6
5
4
3
2
1
0
Sp State
A-FC
Port Mode
Bit [4:0]
Port Mode
(Default 2'b00)
Bit [4:3]
- 00 - Automatic Enable Auto-Negotiation - This enables hardware state machine for auto-negotiation.
- 01 - Limited Disable auto-Negotiation - This disables hardware for speed auto-negotiation. Hardware
Polls MII for link status.
- 10 - Link Down - Force link down (disable the port). Does not talk to PHY.
- 11 - Link Up - Does not talk to PHY. User ERC1 [2:0] for config.
Bit [2]
- 1 - 10Mbps
(Default 1'b0)
- 0 - 100Mbps
Bit 2 is used only when the port is in MII (10/100) mode.
Bit [1]
- 1 - Half Duplex (Do not use)
(Default 1'b0)
- 0 - Full Duplex
Register
Description
CPU
Addr
(Hex)
R/W
I
2
C
Addr
(Hex)
Default
Notes
Table 7 - MVTX2801 Register Description (continued)
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