參數(shù)資料
型號(hào): MV12032
廠商: Mosel Vitelic, Corp.
英文描述: 80" ROMless Reco Smart Monolithic Microcomputer(語音存儲(chǔ)時(shí)間為80秒,無ROM單片智能微型電子計(jì)算機(jī))
中文描述: 80“無ROM雷科單片機(jī)智能(語音存儲(chǔ)時(shí)間為80秒,無光盤單片智能微型電子計(jì)算機(jī))
文件頁數(shù): 1/12頁
文件大?。?/td> 45K
代理商: MV12032
MV12030/12032
80" Reco Smart
/ROMless Reco Smart
MOSEL VITELIC INC.
1/10
PID 258*** 05/98
Specifications subject to change without notice, contact your sales representatives for the most recent information.
May 1998
Features
Working at 2.7V through 6.0V.
80C52 instruction compatible.
Sample rate ranges from 2 KHz to 100 KHz.
Working at up to 40 MHz clock either by crystal
or external resistor.
4 x 8 input/output pins.
Each bit could be programmed into one of 5
states.
8 K bytes program ROM is built in.
16 K bytes SRAM built-in.
Up to 90 seconds (496 K bytes equivalent)
voice duration is supported.
Dual Tone Melody play capability up to
thousands of note.
Sleep mode is provided.
Wake-up-able from sleep mode by port 0.
Variable loudness per word (per note).
Variable pitch per word (per note).
Its derivatives are to be available.
Description
The MV12032 chip is a monolithic microcomputer that have necessary peripheral built-in to perform versatile
applications. It has 32-bit i/o pin, dual tone melody capability, ROM, ADC, DACs, RAM, etc.
It is easily to reach the voice play, dual tone melody, recording, recognition, applications, etc.
RecoSmart is a trademark (#757589) of Mosel Vitelic Inc.
4 channel mux'ed AD converter working at 10
bits @ 100 KHz.
AGC is provided.
2 sets of 8 bit DA converter.
An watch dog timer is provided.
2 interrupt pins are provided to obtain external
events.
A reset pin is provided.
Evaluation chip MV12030 (ROM less) is provided.
The evaluation board with this evaluation chip on it
is provided.
Developing tool is provided by integration of MVI
proprietary emulation board M9171 and commercial
8052 ICE to user to write his own application
program.
An user's manual pid 393 is provided.
Mask Options
Reset Threshold voltage, 3 options.
Preliminary
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