Semiconductor Components Industries, LLC, 2005
December, 2005 Rev. 7
1
Publication Order Number:
MUN5211DW1T1/D
MUN5211DW1T1 Series
Preferred Devices
Dual Bias Resistor
Transistors
NPN Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a baseemitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the MUN5211DW1T1 series,
two BRT devices are housed in the SOT363 package which is ideal
for low power surface mount applications where board space is at a
premium.
Features
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
PbFree Packages are Available
MAXIMUM RATINGS
(T
A
= 25
°
C unless otherwise noted, common for Q
1
and Q
2
)
Rating
Symbol
V
CBO
V
CEO
I
C
Value
50
50
100
Unit
Vdc
Vdc
mAdc
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol
Max
Unit
Total Device Dissipation
T
A
= 25
°
C
Derate above 25
°
C
P
D
187 (Note 1)
256 (Note 2)
1.5 (Note 1)
2.0 (Note 2)
670 (Note 1)
490 (Note 2)
mW
mW/
°
C
Thermal Resistance,
Junction-to-Ambient
R
JA
°
C/W
Characteristic
(Both Junctions Heated)
Symbol
Max
Unit
Total Device Dissipation
T
A
= 25
°
C
Derate above 25
°
C
P
D
250 (Note 1)
385 (Note 2)
2.0 (Note 1)
3.0 (Note 2)
493 (Note 1)
325 (Note 2)
mW
mW/
°
C
Thermal Resistance,
Junction-to-Ambient
R
JA
°
C/W
Thermal Resistance,
Junction-to-Lead
R
JL
188 (Note 1)
208 (Note 2)
°
C/W
Junction and Storage Temperature
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. FR4 @ Minimum Pad
2. FR4 @ 1.0 x 1.0 inch Pad
T
J
, T
stg
55 to +150
°
C
Preferred
devices are recommended choices for future use
and best overall value.
http://onsemi.com
Q
1
R
1
R
2
R
2
R
1
Q
2
(1)
(2)
(3)
(4)
(5)
(6)
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
SOT363
CASE 419B
STYLE 1
1
6
MARKING DIAGRAM
6
xx
M
1
xx
M
= Device Code
= Date Code*
= PbFree Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may
vary depending upon manufacturing location.