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MU9C1480A/L Draft
Rev. 3.0 Draft
20
Instruction: Data Move Continued
Operation
Memory at Next Free Address, Location set Valid, from:
Comparand Register
Masked byMR1
Masked byMR2
Mask Register 1
Mask Register 2
Mnemonic
Op-Code
MOV NF,CR,V
MOV NF,CR[MR1],V
MOV NF,CR[MR2],V
MOV NF,MR1,V
MOV NF,MR2,V
0334H
0374H
03B4H
0335H
0336H
Instruction: Validity Bit Control
Operation
Set Validity bits at Address Register
Set Valid
Set Empty
Set Skip
Set Random Access
Mnemonic
Op-Code
VBC [AR],V
VBC [AR],E
VBC [AR],S
VBC [AR],R
0424H
0425H
0426H
0427H
Set Validity bits at Address
Set Valid
Set Empty
Set Skip
Set Random Access
VBC aaaH,V
VBC aaaH,E
VBC aaaH,S
VBC aaaH,R
0C24H
0C25H
0C26H
0C27H
Set Validity bits at Highest-Priority Match
Set Valid
Set Empty
Set Skip
Set Random Access
VBC HM,V
VBC HM,E
VBC HM,S
VBC HM,R
042CH
042DH
042EH
042FH
Set Validity bits at All Matching Locations
Set Valid
Set Empty
Set Skip
Set Random Access
VBC ALM,V
VBC ALM,E
VBC ALM,S
VBC ALM,R
043CH
043DH
043EH
043FH
Instruction: Compare
Operation
Compare Valid Locations
Compare Empty Locations
Compare Skipped Locations
Comp. Random Access Locations CMP R
Mnemonic
CMP V
CMP E
CMP S
Op-Code
0504H
0505H
0506H
0507H
Instruction: Special Instructions
Operation
Shift Comparand Right
Shift Comparand Left
Shift Mask Register 2 Right
Shift Mask Register 2 Left
Select Foreground Registers
Select Background Registers
Reset Seg. Cont. Reg. to Initial Val. RSC
Mnemonic
SFT CR, R
SFT CR, L
SFT M2, R
SFT M2, L
SFR
SBR
Op-Code
0600H
0601H
0610H
0611H
0618H
0619H
061AH
Instruction: Miscellaneous Instructions
Operation
No Operation
Set Full Flag
Mnemonic
NOP
SFF
Op-Code
0300H
0700H
INSTRUCTION SET SUMMARY Continued
Instruction: Data Move Continued
Operation
Mem. at Highest-Prio. Match
Masked by MR1
Masked by MR2
Mnemonic
MOV CR,HM
MOV CR,HM[MR1]
MOV CR,HM[MR2]
Op-Code
0305H
0345H
0385H
Mask Register 2 from:
Comparand Register
Mask Register 1
No Operation
Memory at Address Reg.
Memory at Address
Mem. at Highest-Prio. Match MOV MR2,HM
MOV MR2,CR
MOV MR2,MR1
NOP
MOV MR2,[AR]
MOV MR2,aaaH
0310H
0311H
0312H
0314H
0B14H
0315H
Memory at Address Register, No Change to Validity bits, from:
Comparand Register
Masked by MR1
Masked byMR2
Mask Register 1
Mask Register 2
MOV [AR],CR
MOV [AR],CR[MR1]
MOV [AR],CR[MR2]
MOV [AR],MR1
MOV [AR],MR2
0320H
0360H
03A0H
0321H
0322H
Memory at Address Register, Location set Valid, from:
Comparand Register
Masked by MR1
Masked byMR2
Mask Register 1
Mask Register 2
MOV [AR],CR,V
MOV [AR],CR[MR1],V 0364H
MOV [AR],CR[MR2],V 03A4H
MOV [AR],MR1,V
MOV [AR],MR2,V
0324H
0325H
0326H
Memory at Address, No Change to Validity bits, from:
Comparand Register
Masked by MR1
Masked byMR2
Mask Register 1
Mask Register 2
MOV aaaH0,CR
MOV aaaH,CR[MR1]
MOV aaaH,CR[MR2]
MOV aaaH,MR1
MOV aaaH,MR2
0B20H
0B60H
0BA0H
0B21H
0B22H
Memory at Address, Location set Valid, from:
Comparand Register
Masked by MR1
Masked byMR2
Mask Register 1
Mask Register 2
MOV aaaH,CR,V
MOV aaaH,CR[MR1],V0B64H
MOV aaaH,CR[MR2],V0BA4H
MOV aaaH,MR1,V
0B24H
0B25H
0B26H
Memory at Highest-Priority Match, No Change to Validity bits,
from:
Comparand Register
Masked by MR1
Masked byMR2
Mask Register 1
Mask Register 2
MOV HM,CR
MOV HM,CR[MR1]
MOV HM,CR[MR2]
MOV HM,MR1
MOV HM,MR2
0328H
0368H
03A8H
0329H
032AH
Memory at Highest-Priority Match, Location set Valid, from:
Comparand Register
Masked by MR1
Masked byMR2
Mask Register 1
Mask Register 2
MOV HM,CR,V
MOV HM,CR[MR1],V 036CH
MOV HM,CR[MR2],V 03ACH
MOV HM,MR1,V
MOV HM,MR2,V
032CH
032DH
032EH
Memory at Next Free Address, No Change to Validity bits,
from:
Comparand Register
Masked byMR1
Masked byMR2
Mask Register 1
Mask Register 2
MOV NF,CR
MOV NF,CR[MR1]
MOV NF,CR[MR2]
MOV NF,MR1
MOV NF,MR2
0330H
0370H
03B0H
0331H
0332H