參數(shù)資料
型號(hào): MTV118
廠商: Electronic Theatre Controls, Inc.
英文描述: On-Screen-Display for LCD Monitor
中文描述: 屏幕為液晶顯示器面板
文件頁數(shù): 16/30頁
文件大?。?/td> 291K
代理商: MTV118
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification
without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sales of
the product.
1/15
MTV118 Revision 2.0 01/01/1999
MTV118
MYSON
TECHNOLOGY
On-Screen-Display for LCD Monitor
FEATURES
Horizontal sync input may be up to 120 KHz.
Acceptable wide-range pixel clock up to 96MHz
from XIN pin.
Full-screen display consists of 15 (rows) by 30 (col-
umns) characters.
12 x 18 dot matrix per character.
Total of 256 characters and graphic fonts including
248 mask ROM fonts and 8 programmable RAM
fonts.
8 color selection maximum per display character.
Double character height and/or width control.
Programmable positioning for display screen cen-
ter.
Bordering, shadowing and blinking effect.
Programmable vertical character height (18 to 71
lines) control.
Row to row spacing register to manipulate the con-
stant display height.
4 programmable background windows with multi-
level operation.
Software clears for display frame.
Half tone and fast blanking output.
8-channel/8-bit PWM D/A converter output.
Compatible with SPI bus or I
2
C interface with
address 7AH (slave address is mask option).
16 or 24-pin PDIP/SOP package.
GENERAL DESCRIPTION
MTV118 is designed for LCD monitor appli-
cations to display the built-in characters or fonts
onto an LCD monitor screen. The display oper-
ates by transferring data and control information
from the micro controller to the RAM through a
serial data interface. It can execute full screen
displays automatically and specific functions such
as character bordering, shadowing, blinking, dou-
ble height and width, font by font color control,
frame positioning, frame size control by character
height and windowing effect. Moreover, MTV118
also provides 8 PWM DAC channels with 8-bit
resolution and a PWM clock output for external
digital-to-analog control.
BLOCK DIAGRAM
SERIAL DATA
INTERFACE
ADDRESS BUS
ADMINISTRATOR
VERTICAL
DISPLAY
CONTROL
DISPLAY & ROW
CONTROL
REGISTERS
COLOR
ENCODER
WINDOWS &
FRAME
CONTROL
W
W
W
F
B
LUMAR
LUMAG
LUMAB
BLINK
VCLKX
DATA
VERTD
HORD
CH
8
8
7
BSEN
SHADOW
OSDENB
HSP
VSP
HORIZONTAL
DISPLAY CONTROL
CLOCK
GENERATOR
8
DATA
LPN
CWS
VCLKS
5
DATA
CWS
CHS
8
LUMAR
LUMAG
LUMAB
BLINK
CRADDR
8
LUMA
BORDER
ARWDB
HDREN
VCLKX
HORD8
CH
CHS
VERTD
7
8
LPN
NROW
VDREN
5
RCADDR
DADDR
FONTADDR
WINADDR
PWMADDR
5
9
9
5
5
ARWDB
HDREN
VDREN
NROW
DATA
ROW, COL
ACK
8
9
CHARACTER ROM
USER FONT RAM
LUMINANCE &
BORDGER
GENERATOR
VDD
VSS
VDDA
VSSA
ROUT
GOUT
BOUT
FBKG
HTONE
HFLB
NC
XIN
VFLB
SSB
SCK
SDA
VSP
HSP
PWM D/A
CONVERTER
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
8
DATA
8
POWER ON
RESET
PRB
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